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参数资料
型号： ML610Q409P-NNNTBZ03A
厂商： LAPIS SEMICONDUCTOR CO LTD
元件分类： 微控制器/微处理器
英文描述： RISC MICROCONTROLLER, PQFP100
封装： 14 X 14MM, 0.50 PITCH, PLASTIC, TQFP-100
文件页数： 3/62页
文件大小： 1994K
代理商： ML610Q409P-NNNTBZ03A
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1. Overview
page 9
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M
Apply 3.0 to 5.5 V to both VCC1 and VCC2 pins. Apply 0 V to the
VSS pin. VCC1
≥ VCC2(1)
Supplies power for the A/D converter. Connect the AVCC pin to
VCC1 and the AVSS pin to VSS
The microcomputer is in a reset state when "L" is applied to the
____________
RESET pin
Connect this pin to VCC1
Switches the data bus in external memory space 3. The data
bus is 16 bits long when the this pin is held "L" and 8 bits long
when the this pin is held "H". Set it to either one.
Inputs and outputs data (D0 to D7) while accessing an external
memory space with separate bus
Inputs and outputs data (D8 to D15) while accessing an external
memory space with 16-bit separate bus
Outputs address bits (A0 to A22)
Outputs inversed address bit A23
Inputs and outputs data (D0 to D7) and outputs 8 low-order
address bits (A0 to A7) by time-sharing while accessing an
external memory space with multiplexed bus
Inputs and outputs data (D8 to D15) and outputs 8 middle-order
address bits (A8 to A15) by time-sharing while accessing an
external memory space with multiplexed bus
______
Output CS0 to CS3 that are chip-select signals specifying an external space
_______
________
______
________
_____
_______
________
Outputs WRL, WRH, (WR, BHE) and RD signals. WRL and WRH
______
_______
can be switched with WR and BHE by program
________
_________
_____
WRL, WRH and RD are selected:
If external data bus is 16 bits wide, data is writtenn to an even
_______
address when WRL is held "L".
________
Data is written to an odd address when WRH is held "L".
_____
Data is read when RD is held "L".
______
________
_____
WR, BHE and RD are selected
______
Data is written to external memory space when WR is held "L".
_____
Data is read when RD is held "L".
________
An odd address is accessed when BHE is held "L".
______
________
_____
Select WR, BHE and RD for an external 8-bit data bus
ALE is a signal latching address
__________
The microcomputer is placed in a hold state while the HOLD pin
is held "L"
Outputs an "L" siganl while the microcomputer is placed in a hold state
Bus is placed in a wait state while the RDY pin is held "L"
VCC1, VCC2
VSS
AVCC
AVSS
____________
RESET
CNVSS
BYTE
D0 to D7
D8 to D15
A0 to A22
______
A23
A0/D0 to
A7/D7
A8/D8 to
A15/D15
______
CS0 to CS3
________ ______
WRL/WR
_________ ________
WRH/BHE
_____
RD
ALE
__________
HOLD
__________
HLDA
________
RDY
Power supply
Analog power
supply input
Reset input
CNVSS
External data
bus width
select input
Bus control
pins
I
I/O
O
I/O
O
I
O
I
-
VCC1
VCC2
Supply
Signal name
Pin name
I/O type
Description
voltage
1.6 Pin Description
Table 1.4 Pin Description
I: Input
O: Output
I/O: Input and output
NOTE:
1. In this manual, hereafter, VCC refers to VCC1 unless otherwise noted.
相关PDF资料
PDF描述
ML610Q409P-XXXTBZ03A RISC MICROCONTROLLER, PQFP100
ML610Q408-XXXWA RISC MICROCONTROLLER, UUC88
ML610Q412P-XXXWA RISC MICROCONTROLLER, UUC95
ML610Q411-XXXWA RISC MICROCONTROLLER, UUC95
ML610Q422-XXXTBZ03A RISC MICROCONTROLLER, PQFP120
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