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参数资料
| 型号： | ML65T541CS |
| 厂商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分类： | 总线收发器 |
| 英文描述： | 8-BIT DRIVER, TRUE OUTPUT, PDSO20 |
| 封装： | SOIC-20 |
| 文件页数： | 3/8页 |
| 文件大小： | 104K |
| 代理商： | ML65T541CS |
ML65T541
REV. 1.0 10/25/2000
3
ELECTRICAL CHARACTERISTICS
Unless otherwise stated, these specifications apply for: VCC = 3.3V ± 10%, TA = 0°C to 70°C (Note 1)
symbol
parameter
conditions
min
typ
max
units
AC ELECTRICAL CHARACTERISTICS (CLOAD = 50pF, RLOAD = 500)
tPLH, tPHL
Propagation delay
Ai to Bi (Note 2)
1.4
2.0
ns
tOE
Output enable time
10
20
ns
OE1, OE2 to Bi
tOD
Output disable time
15
20
ns
OE1, OE2 to Bi
CIN
Input capacitance
8
pF
DC ELECTRICAL CHARACTERISTICS (CLOAD = 50pF, RLOAD = )
VIH
Input high voltage
Logic HIGH (Note 3)
2.0
V
VIL
Input low voltage
Logic LOW (Note 3)
0.8
V
IIH
Input high current
Per pin, VIN = 3V
0.2
0.8
mA
IIL
Input low current
Per pin, VIN = 0
0.3
0.8
mA
IHI-Z
Three-state output current 0 < VIN < VCC
5A
IOS
Short circuit current
VO = GND (Note 4)
–60
–225
mA
VIC
Input clamp voltage
IIN = 18mA
–0.7
–1.2
V
VOH
Output high voltage
IOH = 100A (Note 5)
2.4
V
VOL
Output low voltage
IOL = 5mA (Notes 5,6)
0.6
V
ICC
Quiescent Power
Freq = 0Hz, VIN = 0V,
55
80
mA
Supply Current
outputs open
Note 1: Limits are guaranteed by 100% testing, sampling or correlation with worst case test conditions.
Note 2: One line switching, see Figure 3, tPLH, tPHL versus CL.
Note 3: Inputs should be driven to within 0.3V of the rail. Although the inputs are TTL compatible, at the minimum logic high voltage, the circuit will draw current due
to the buffer action ( 20mA per channel).
Note 4: Not more than one output should be shorted for more than a second.
Note 5: See Figure 2 for IOH versus VOH and IOL versus VOL data.
Note 6: The output can source or sink more than 100 mA when switching. IOL is only significant as a DC specification.
1.5V
tPHL
tPLH
tR, tF ≤ 4ns, f = 66MHz
3V
0V
3V
0V
INPUT
OUTPUT
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