Contents - 13
17.5 USB Transceiver ............................................................................................................ 17-57
17.5.1
Overview of USB Transceiver Circuit ................................................................... 17-57
17.5.2
Method for and Notes on Connecting the USB Cable to USB Terminal (D+/D–)........17-57
(1)
Length of the wiring between the USB connector and USB terminal (D+/D–)..... 17-57
(2)
External series resistor ........................................................................................... 17-57
(3)
Pull-up resistor on the D+ line (high-speed data transfer) ..................................... 17-57
(4)
Procedure required if the USB cable has not been connected................................ 17-58
17.6 Notes on Using the USB ................................................................................................ 17-59
Chapter 18
Media Control Function
18.1 Overview.......................................................................................................................... 18-1
18.2 Registers for Media Control Functions ............................................................................ 18-1
18.2.1
Description of the Registers for the Media Control Functions................................. 18-3
(1)
Media sequencer control register (MSCTRL).......................................................... 18-3
(2)
Media sequencer wait register (MSWAIT).............................................................. 18-7
(3)
Media sequencer status register (MSSTS) ............................................................... 18-8
(4)
Media sequencer error status register (MSERR)...................................................... 18-9
(5)
Media command register (MMCMD) .................................................................... 18-10
(6)
Media address register (MMADR) ........................................................................ 18-10
(7)
Media data register (MMDATA) ........................................................................... 18-11
(8)
Media selector register (MMSEL) ......................................................................... 18-11
(9)
ECC1 line parity register (ECC1LP)...................................................................... 18-12
(10)
ECC2 line parity register (ECC2LP)...................................................................... 18-12
(11)
ECC1 column parity register (ECC1CP) ............................................................... 18-13
(12)
ECC2 column parity register (ECC2CP) ............................................................... 18-13
(13)
ECC1 error pointer register (ECC1ERR)............................................................... 18-14
(14)
ECC2 error pointer register (ECC2ERR)............................................................... 18-14
(15)
Redundancy part reserved data 1 register (HREV1) .............................................. 18-15
(16)
Redundancy part reserved data 2 register (HREV2) .............................................. 18-15
(17)
Redundancy part data/block status register (HSTATS) ......................................... 18-16
(18)
Redundancy part block address 1 register (HBADR1) .......................................... 18-17
(19)
Redundancy part ECC2-High register (HECC2H) ................................................ 18-18
(20)
Redundancy part ECC2-Low/block address 2 register (HECC2LA) ..................... 18-19
(21)
Redundancy part ECC1-High/block address 2 register (HECC1HA).................... 18-20
(22)
Redundancy part ECC1-Low register (HECC1L).................................................. 18-21
18.3 Wait Function................................................................................................................. 18-22
18.3.1
Wait Functions during Write Operations ............................................................... 18-22
18.3.2
Wait Functions during Read Operations ................................................................ 18-24