参数资料
型号: ML6692CH
英文描述: 100BASE-TX Physical Layer with MII
中文描述: 100BASE - TX的物理层与信息产业部
文件页数: 6/21页
文件大小: 325K
代理商: ML6692CH
ML6692
14
INITIALIZATION INTERFACE
The ML6692 has an Initialization Interface to allow
register programming that is not supported by the MII
Management Interface. The intitialization data is loaded
at power-up and cannot be changed afterwards. The pin
EDIN selects one of three possible programming modes.
The Initialization Register bit assignment is shown in
Table 1.
EEPROM PROGRAMMING
With EDIN floating (set to a high impedance), the
ML6692 reads the 16 configuration bits from an external
serial EEPROM (93LC46 or similar) using the industry-
standard 3-wire serial I/O protocol. After power up, the
ML6692 automatically generates the address at EDIN and
the clock at ECLK to read out the 16 configuration bits.
The EEPROM generates the configuration bit stream at
EDOUT, synchronized with ECLK. Interface timing is
shown in Figure 6. It is important to note that the ML6692
expects LSBs first, whereas the 93LC46 shifts MSBs out
first. Therefore, the data pattern must be reversed before
programming it into the EEPROM.
MICROCONTROLLER PROGRAMMING
With EDIN high, the ML6692 expects the 16
configuration bits transfered directly at EDOUT,
synchronized with the first 16 clock rising edges provided
externally at ECLK after power-up. This mode is useful
with a small microcontroller; one controller can program
several ML6692 parts by selectively toggling their ECLK
pins. Interface timing is shown in Figure 7.
ML6692 HARD-WIRED DEFAULT
With EDIN low, the SEL10HD, SEL10FD, and SEL100T4
pins set their corresponding bits in the management status
register, and the ML6692 responds to MII PHYAD 00000
only.
FUNCTION OF RELATED PINS
EDIN
MODE
SEL10FD/ECLK
SEL100T4/EDOUT
SEL10HD
Floating
EEPROM
ECLK (Output Clock
EDOUT (Input Data
No Affect
(EEPROM ADDR)
to EEPROM)
from EEPROM)
High
Microcontroller
ECLK (Input Clock
EDOUT (Input Data
No Affect
from Microcontroller) from Microcontroller)
Low
Hardwired
SEL10FD
SEL100T4
SEL10HD
(Initialization bit 9)
(Initialization bit 8)
(Initialization bit 10)
EDOUT
(DRIVEN BY
EEPROM)
ECLK
(DRIVEN BY
ML6692)
EDIN
(DRIVEN BY
ML6692)
01
SB
1
OP1
1
OP0
0
A5
0
A4
0
A3
0
A2
0
A1
0
A0
0
02
03
04
05
06
07
08
09
10
11
D0
D1
D2
D3
D14
D15
12
13
26
tDV1
16 BITS DATA ADDRESS
tPW1
tPW2
tPER1
Figure 6. EEPROM Interface Timing
EDOUT
(INPUT TO
ML6692)
ECLK
(INPUT TO
ML6692)
01
02
16
tS1
tH1
tPW4
tPER2
tPW3
Figure 7. Microcontroller Mode Interface Timing
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ML6692CQ 制造商:MICRO-LINEAR 制造商全称:MICRO-LINEAR 功能描述:100BASE-TX Physical Layer with MII
ML6694 制造商:MICRO-LINEAR 制造商全称:MICRO-LINEAR 功能描述:100BASE-TX Physical Layer with 5-Bit Interface
ML6694CH 制造商:MICRO-LINEAR 制造商全称:MICRO-LINEAR 功能描述:100BASE-TX Physical Layer with 5-Bit Interface
ML6694CQ 制造商:MICRO-LINEAR 制造商全称:MICRO-LINEAR 功能描述:100BASE-TX Physical Layer with 5-Bit Interface
ML6695 制造商:MICRO-LINEAR 制造商全称:MICRO-LINEAR 功能描述:100BASE-X Fiber Physical Layer With 5-bit Interface