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参数资料
| 型号： | ML674000TB |
| 厂商： | OKI ELECTRIC INDUSTRY CO LTD |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 32-BIT, 33.333 MHz, RISC MICROCONTROLLER, PQFP128 |
| 封装： | 14 X 14 MM, 0.40 MM PITCH, PLASTIC, TQFP-128 |
| 文件页数： | 5/28页 |
| 文件大小： | 189K |
| 代理商： | ML674000TB |
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Oki Semiconductor
ML674000
11/22
Pin Name
I/O
Description
Primary/
Secondary
Logic
External bus
XA[23:19]
O
Address bus to external RAM, external ROM, external I/O banks, and
external DRAM. After a reset, these pins are configured for their primary
function (PIOA[14:10]).
Secondary
Positive
XA[18:0]
O
Address bus to external RAM, external ROM, external I/O banks, and
external DRAM
—
Positive
XD[15:0]
I/O
Data bus to external RAM, external ROM, external I/O banks, and external
DRAM
—
Positive
External bus control signals
XROMCS_N
O
ROM bank chip select
—
Negative
XRAMCS_N
O
SRAM bank chip select
—
Negative
XIOCS_N[0]
O
I/O bank 0 chip select
—
Negative
XIOCS_N[1]
O
I/O bank 1 chip select
—
Negative
XOE_N
O
Output enable/read enable
—
Negative
XWE_N
O
Write enable
—
Negative
XBS_N[1:0]
O
Byte select: XBS_N[1] for MSB; XBS_N[0] for LSB
—
Negative
XBWE_N[0]
O
LSB write enable
—
Negative
XBWE_N[1]
O
MSB write enable
—
Negative
XWR
O
Data transfer direction for external bus, used when connecting to Motorola
I/O devices. This represents the secondary function of pin PIOA[15],
produced by setting bit 7 in the port control (GPCTL) register to "1."
Secondary
—
XWAIT
I
External I/O bank 0 WAIT signal.
This input permits access to devices slower than register settings.
Secondary
Positive
External bus control signals (DRAM)
XRAS_N
O
Row address strobe. Used for both EDO DRAM and SDRAM.
Secondary
Negative
XCAS_N
O
Column address strobe signal (SDRAM)
Secondary
Negative
XSDCLK
O
SDRAM clock (same frequency as internal system clock)
Secondary
—
XSDCKE
O
Clock enable (SDRAM)
Secondary
—
XSDCS_N
O
Chip select (SDRAM)
Secondary
Negative
XDQM[1]/
XCAS_N[1]
O
Connected to SDRAM: DQM (MSB)
Connected to EDO DRAM: column address strobe signal (MSB)
Secondary
Positive/
Negative
XDQM[0]/
XCAS_N[0]
O
Connected to SDRAM: DQM (LSB)
Connected to EDO DRAM: column address strobe signal (LSB)
Secondary
Positive/
Negative
相关PDF资料 |
PDF描述 |
|---|---|
| ML674000 | 32-BIT, MROM, 33 MHz, RISC MICROCONTROLLER, PQFP128 |
| ML674001TC | 32-BIT, MROM, 33.333 MHz, RISC MICROCONTROLLER, PQFP144 |
| ML67Q4002TC | 32-BIT, FLASH, 33.333 MHz, RISC MICROCONTROLLER, PQFP144 |
| ML67Q4002LA | 32-BIT, FLASH, 33.333 MHz, RISC MICROCONTROLLER, PBGA144 |
| ML674001LA | 32-BIT, MROM, 33.333 MHz, RISC MICROCONTROLLER, PBGA144 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| ML674000TBZ03A-7 | 制造商:ROHM Semiconductor 功能描述:Integrated Dual UART ARM7TDMI MCU 制造商:ROHM Semiconductor 功能描述:ARM7TDMI microprocessor integrated dual UART |
| ML674001 | 制造商:OKI 制造商全称:OKI electronic componets 功能描述:32-bit ARM-Based General-Purpose Microcontroller |
| ML674001-001TCZ03A | 制造商:Oki Semiconductor 功能描述:OKIML674001-001TCZ03A 32-BIT ARM MICROCO |
| ML674001LA | 制造商:ROHM Semiconductor 功能描述: |
| ML674001TC | 制造商:ROHM Semiconductor 功能描述: |
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