参数资料
型号: ML9040A-A01WA
厂商: OKI ELECTRIC INDUSTRY CO LTD
元件分类: 显示控制器
英文描述: 16 X 40 DOTS DOT MAT LCD DRVR AND DSPL CTLR, UUC81
封装: ALUMINUM PAD, DIE-81
文件页数: 11/49页
文件大小: 515K
代理商: ML9040A-A01WA
ML9040A-Axx/-Bxx
Semiconductor
19/49
PEDL9040A-03
Character Generator RAM (CG RAM)
The CG RAM is used to display user's original character patterns other than character
patterns in the CG ROM.
The CG RAM has a capacity (64 bytes = 512 bits) of writing 8 kinds of characters for 5 x 7
dots and 4 kinds of characters for 5 x 10 dots.
When displaying character patterns stored in the CG RAM, write 8-bit character codes (00
to 07 or 08 to 0F; hex.) on the left side as shown in Table 2. Then it is possible to output the
character pattern to the LCD display position corresponding to the DD RAM address.
The following explains how to write and read character patterns to and from the CG RAM.
(1) When the character pattern is 5 x 7 dots (see Table 3-1).
A method of writing character pattern to the CG RAM by CPU:
Three bits of CG RAM addresses 0-2 correspond to the line position of the character
pattern.
First, set increment or decrement by the CPU, and then input the CG RAM address.
After this, write character patterns to the CG RAM through DB0 - DB7 line by line.
DB0 to DB7 correspond to CG RAM data 0-7 in Table 3-1.
It is displayed when "H" is set as input data and is not displayed when "L" is set as
input data.
Since the ADC is automatically incremented or decremented by 1 after the writing of
data to the CG RAM, it is not necessary to set the CG RAM address again.
The line, in which the CG RAM addresses 0-2 are all "H" ("7" in hexadecimal
notation), is the cursor position. It is ORed with the cursor at the cursor position and
displayed to LCD.
For this reason, it is necessary to set all input data that become cursor positions to "L".
Although CG RAM data 0-4 bits are output to the LCD as display data, CG RAM data
bits 5-7 are not output. The latter can be written and read to and from the RAM, it
is therefore allowed to be used as data RAM.
A method of displaying the CG RAM character pattern to the LCD:
The CG RAM is selected when upper 4 bits of the character codes are all "L".
As character code bit 3 is invalid, the display of "0" in Table 3-1, is selected by
character code "00" (hex.) or "08" (hex.).
When the 8-bit character code of the CG RAM is written to the DD RAM, the character
pattern of the CG RAM is displayed on the LCD display position corresponding to
the DD RAM address. (DD RAM data, bits 0-2 correspond to CG RAM address, bits
3-5.)
相关PDF资料
PDF描述
ML9040A-AXXWA 16 X 40 DOTS DOT MAT LCD DRVR AND DSPL CTLR, UUC81
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ML9040A-AXXWA 16 X 40 DOTS DOT MAT LCD DRVR AND DSPL CTLR, UUC81
ML9040A-BXXWA 16 X 40 DOTS DOT MAT LCD DRVR AND DSPL CTLR, UUC81
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