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参数资料
| 型号： | ML9475 |
| 厂商： | LAPIS SEMICONDUCTOR CO LTD |
| 元件分类： | 显示控制器 |
| 英文描述： | DOT MAT LCD DRVR AND DSPL CTLR, PQFP56 |
| 封装： | 0.65 MM PITCH, PLASTIC, QFP-56 |
| 文件页数： | 3/20页 |
| 文件大小： | 267K |
| 代理商： | ML9475 |
FEDL9475-01
ML9475
11/20
FUNCTIONAL DESCRIPTION
Description of Operation
Display data input
As described in the section on “Data Structure,” display data consists of a data field, which corresponds to the
LCD segments ON and OFF, and a command field, which indicates the input of display data.
Set a value in each of bits C0 and C1 in the command field according to the common output that corresponds to
the display data, and set a display data input command in the remaining four bits.
Data that has been input to the DATA_IN pin is loaded into the shift register on the rising edges of the CLOCK
pulses, transferred to the display data latch during the “H” level period of the LOAD pulse, and then output via
the segment driver.
D1
D2
D3
D4
D38 D39 D40
C0
C1
C2
C3
C4
CLOCK
DATA_IN
Old data
New data
LOAD
Display output
C5
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