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参数资料
| 型号： | MM145453V |
| 厂商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分类： | 显示驱动器 |
| 英文描述： | Liquid Crystal Display Driver |
| 中文描述： | LIQUID CRYSTAL DISPLAY DRIVER, PQCC44 |
| 封装： | PLASTIC, LCC-44 |
| 文件页数： | 3/5页 |
| 文件大小： | 100K |
| 代理商： | MM145453V |
Electrical Characteristics
(Continued)
Block Diagram
Applications Information
The MM145453 is specifically designed to operate 4
1
2
digit
7-segment displays with minimal interface with the display
and data source. Serial data transfer from the data source to
the display driver is accomplished with 2 signals, serial Data
and Clock. Using a format of a leading
″
1
″
followed by the 33
data bits and 2 trailing don’t care bits, allows data transfer
without the need of an additional Data Load signal. Since the
MM145453 does not contain a character generator, the for-
matting of the segment information must be done prior to in-
putting the data to the MM145453. The transfer of the 33
data bits is complete at the falling edge of the 36th clock
cycle, thus providing non-multiplexed, direct drive to the dis-
play. Outputs change only if the serial data bits differ from
the previous time.
Figure 3shows the data input format.Asingle start bit of logi-
cal ’1’ precedes the 33 bits of segment data for a total of 34
bits that need to be defined and clocked in. After the 34 bits
are clocked in, 2 additional clock cycles are required. At the
36th clock cycle an internal LOAD signal is generated syn-
chronously with the rising edge of the Clock In signal, which
loads the 33 bits of segment data in the shift register into the
latches. At the falling edge of the 36th clock cycle an internal
RESET signal is generated which clears all the shift registers
for the next set of data. The shift registers are static master-
slave configuration. There is no clear for the master portion
of the first shift register, thus allowing continuous operation.
The data during the 35th and 36th clock cycles is
″
don’t
care
″
, but setting data to logical ’0’ for these two clock cycles
is the preferred format.
The data input bits map directly to the segment output pins
and the display. The MM145453 does not have any format
restrictions, as all outputs are controllable.
The MM145453 has an internal oscillator which can gener-
ate the required clock signal to drive the LCD back plane.
The frequency of the internal oscillator is set by a pull-up re-
sistor (R
) connected from the OSC_IN pin to V
, and
a capacitor (C
) connected from the OSC_IN pin to
Ground. Due to the current sink limitations of the OSC_IN
circuitry, the lowest recommended resistor value for setting
the oscillator frequency is 9k
. It will typically take 2 to 4 RC
time constants to charge the OSC_IN pin from near 0V to
within 1V of V
which is the high threshold voltage point for
the OSC_IN circuitry. An approximate calculation of f
OSC
is:
f
OSC
= 1 / (l
η
(V
DD
/1V) X R
OSC_IN
X C
OSC_IN
)
A R
resistor value of 50k
with a C
capacitor
value of 0.01μF and a V
value of 5.00V would produce a
typical oscillator frequency ( f
) of about 1200Hz. The
f
signal is divided by 16 before it is presented at the
BP_OUT pin. For this example the approximate BP_OUT
frequency will be f
OSC
/16, or about 75Hz.
DS101283-2
FIGURE 1.
DS101283-3
FIGURE 2.
M
www.national.com
3
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MM145453V/NOPB | 功能描述:LCD 驱动器 LIQUID CRYSTAL DISPLAY DRIVER RoHS:否 制造商:Maxim Integrated 数位数量:4.5 片段数量:30 最大时钟频率:19 KHz 工作电源电压:3 V to 3.6 V 最大工作温度:+ 85 C 最小工作温度:- 20 C 封装 / 箱体:PDIP-40 封装:Tube |
| MM145453VX | 功能描述:显示驱动器和控制器 RoHS:否 制造商:Panasonic Electronic Components 工作电源电压:2.7 V to 5.5 V 最大工作温度: 安装风格:SMD/SMT 封装 / 箱体:QFN-44 封装:Reel |
| MM145453VX/NOPB | 功能描述:显示驱动器和控制器 RoHS:否 制造商:Panasonic Electronic Components 工作电源电压:2.7 V to 5.5 V 最大工作温度: 安装风格:SMD/SMT 封装 / 箱体:QFN-44 封装:Reel |
| MM1458 | 制造商:MITSUMI 制造商全称:Mitsumi Electronics, Corp. 功能描述:Regulator+Reset IC Monolithic IC |
| MM1469 | 制造商:MITSUMI 制造商全称:Mitsumi Electronics, Corp. 功能描述:4-ch BTL Motor Driver for CD Players |
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