参数资料
型号: MM5451N
厂商: NATIONAL SEMICONDUCTOR CORP
元件分类: 显示驱动器
英文描述: LED Display Drivers
中文描述: LED DISPLAY DRIVER, PDIP40
封装: PLASTIC, DIP-40
文件页数: 2/8页
文件大小: 125K
代理商: MM5451N
Absolute Maximum Ratings
If MilitaryAerospace specified devices are required
please contact the National Semiconductor Sales
OfficeDistributors for availability and specifications
Voltage at Any Pin
V
SS
b
03V to V
SS
a
12V
b
25 C to
a
85 C
b
65 C to
a
150 C
Operating Temperature
Storage Temperature
Junction Temperature
a
150 C
300 C
Lead Temperature (Soldering 10 sec)
Power Dissipation at
a
25 C
Molded DIP Package Board Mount
Molded DIP Package Socket Mount
Molded DIP Package board mount
i
JA
e
49 CW
Derate 204 mW
C above 25 C
Molded DIP Package socket mount
i
JA
e
54 CW
Derate 185 mW
C above 25 C
25W
23W
Electrical Characteristics
T
A
withinoperatingrangeV
DD
e
475Vto110VV
SS
e
0Vunlessotherwisespecified
Parameter
Conditions
Min
Typ
Max
Units
Power Supply
475
11
V
Power Supply Current
Excluding Output Loads
7
mA
Input Voltages
Logical ‘‘0’’ Level (V
L
)
Logical ‘‘1’’ Level (V
H
)
g
10
m
A Input Bias
475V
s
V
DD
s
525V
V
DD
l
525V
b
03
22
08
V
DD
V
DD
V
V
V
V
DD
b
2V
Brightness Input (Note 2)
0
075
mA
Output Sink Current
Segment OFF
Segment ON
V
OUT
e
30V
V
OUT
e
1V (Note 3)
Brightness Input
e
0
m
A
Brightness Input
e
100
m
A
Brightness Input
e
750
m
A
10
m
A
0
10
4
25
m
A
mA
mA
20
15
27
Brightness Input Voltage (Pin 19)
Input Current 750
m
A
30
43
V
Output Matching (Note 1)
g
20
%
Clock Input
Frequency f
C
High Time t
h
Low Time t
l
(Notes 5 and 6)
500
kHz
ns
ns
950
950
Data Input
Set-Up Time t
DS
Hold Time t
DH
300
300
ns
ns
Data Enable Input
Set-Up Time t
DES
Note 1
Output matching is calculated as the percent variation (I
MAX
a
I
MIN
)2
Note 2
With a fixed resistor on the brightness input pin some variation in brightness will occur from one device to another Maximum brightness input curren t can
be 2 mA as long as Note 3 and junction temperature equation are complied with
Note 3
See Figures 5 6
and 7 for Recommended Operating Conditions and limits Absolute maximum for each output should be limited to 40 mA
Note 4
The V
OUT
voltage should be regulated by the user See Figures 6 and 7 for allowable V
OUT
vs I
OUT
operation
Note 5
AC input waveform specification for test purpose t
r
s
20 ns t
f
s
20 ns f
e
500 kHz 50%
g
10% duty cycle
Note 6
Clock input rise and fall times must not exceed 300 ns
100
ns
Connection Diagrams
Dual-In-Line Package
TLF6136–2
Top View
FIGURE 2a
Order Number MM5450N MM5451N MM5450V or MM5451V
See NS Package Number N40A or V44A
Dual-In-Line Package
TLF6136–3
Top View
FIGURE 2b
2
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