参数资料
型号: MM54HC4511
厂商: National Semiconductor Corporation
英文描述: BCD-to-7 Segment Latch/Decoder/Driver
中文描述: BCD码至7段锁存器/解码器/驱动器
文件页数: 1/6页
文件大小: 140K
代理商: MM54HC4511
TL/F/5373
M
January 1988
MM54HC4511/MM74HC4511
BCD-to-7 Segment Latch/Decoder/Driver
General Description
This high speed latch/decoder/driver utilizes advanced sili-
con-gate CMOS technology. It has the high noise immunity
and low power consumption of standard CMOS integrated
circuits, as well as the ability to drive 10 LS-TTL loads. The
circuit provides the functions of a 4-bit storage latch, an
8421 BCD-to-seven segment decoder, and an output drive
capability. Lamp test (LT), blanking (Bl), and latch enable
(LE) inputs are used to test the display, to turn-off or pulse
modulate the brightness of the display, and to store a BCD
code, respectively. It can be used with seven-segment light
emitting diodes (LED), incandescent, fluorescent, gas dis-
charge, or liquid crystal readouts either directly or indirectly.
Applications include instrument (e.g., counter, DVM, etc.)
display driver, computer/calculator display driver, cockpit
display driver, and various clock, watch, and timer uses.
The 54HC/74HC logic family is speed, function, and pinout
compatible with the standard 54LS/74LS logic family. All
inputs are protected from damage due to static discharge by
internal diode clamps to V
CC
and ground.
Features
Y
Latch storage of input data
Y
Blanking input
Y
Lamp test input
Y
Low power consumption characteristics of CMOS
devices
Y
Wide operating voltage range: 2 to 6 volts
Y
Low input current: 1
m
A maximum
Y
Low quiescent current: 80
m
A maximum over full tem-
perature range (74 Series)
Connection Diagram
Dual-In-Line Package
TL/F/5373–1
Order Number MM54HC4511 or MM74HC4511
Truth Table
INPUTS
OUTPUTS
LE BI LT D C B A a b c d e
f
g DISPLAY
x
x
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
H
x
L
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
x x x x H H H H H H H
x x x x L L L L L L L
L L L L H H H H H H L
L L L H L H H L L L L
L L H L H H L H H L H
L L H H H H H H L L H
L H L L L H H L L H H
L H L H H L H H L H H
L H H L L L H H H H H
L H H H H H H L L L L
H L L L H H H H H H H
H L L H H H H L L H H
H L H L L L L L L L L
H L H H L L L L L L L
H H L L L L L L L L L
H H L H L L L L L L L
H H H L L L L L L L L
H H H H L L L L L L L
x x x x
8
0
1
2
3
4
5
6
7
8
9
*
*
x
e
Don’t care
*
e
Depends upon the BCD code applied during the 0 to 1 transition of LE.
C
1995 National Semiconductor Corporation
RRD-B30M105/Printed in U. S. A.
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