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参数资料
| 型号： | MM54HCT534J |
| 厂商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分类： | 总线收发器 |
| 英文描述： | HCT SERIES, 8-BIT DRIVER, INVERTED OUTPUT, CDIP20 |
| 封装： | DIP-20 |
| 文件页数： | 1/6页 |
| 文件大小： | 124K |
| 代理商： | MM54HCT534J |
TLF6123
MM54HCT533MM74HCT533
TRI-STATE
Octal
D-Type
Latch
with
Inverted
Outputs
MM54HCT534MM74HCT534
TRI-STATE
Octal
D-Type
Flip-Flop
with
Inverted
Outputs
November 1987
MM54HCT533MM74HCT533
TRI-STATE
Octal D-Type Latch with Inverted Outputs
MM54HCT534MM74HCT534
TRI-STATE Octal D-Type Flip-Flop with Inverted Outputs
General Description
The MM54HCT533MM74HCT533 octal D-type latches and
MM54HCT534MM74HCT534 Octal D-type flip-flops utilize
advanced silicon-gate CMOS technology which provides the
inherent benefits of low power consumption and wide power
supply range but are LS-TTL input and output characteristic
pin-out compatible The TRI-STATE outputs are capable
of driving 15 LS-TTL loads All inputs are protected from
damage due to static discharge by internal diodes to VCC
and ground
When the MM54HCT533MM74HCT533 LATCH ENABLE
input is high the data present on the D inputs will appear
inverted at the QBar outputs When the LATCH ENABLE
goes low the inverted data will be retained at the QBar
outputs until LATCH ENABLE returns high again When a
high logic level is applied to the OUTPUT CONTROL input
all outputs go to a high impedance state regardless of what
signals are present at the other inputs and the state of the
storage elements
The MM54HCT534MM74HCT534 are positive edge trig-
gered flip-flops Data at the D inputs meeting the setup and
hold time requirements are inverted and transferred to
the Q outputs on positive going transitions of the CLOCK
(CK) input When a high logic level is applied to the OUT-
PUT CONTROL (OC) input all outputs go to a high imped-
ance state regardless of what signals are present at the
other inputs and the state of the storage elements
MM54HCTMM74HCT devices are intended to interface be-
tween TTL and NMOS components and standard CMOS
devices These parts are also plug-in replacements for LS-
TTL devices and can be used to reduce power consumption
in existing designs
Features
Y
TTL input characteristic compatible
Y
Typical propagation delay 18 ns
Y
Low input current 1 mA maximum
Y
Low quiescent current 80 mA maximum
Y
Compatible with bus-oriented systems
Y
Output drive capability 15 LS-TTL loads
Truth Tables
’HCT533
Output
Latch
Control
Enable
Data
Output
G
LH
H
L
LH
L
H
LL
X
Q0
HX
X
Z
’HCT534
Output
Clock
Data
Output
Control
L
u
HL
L
u
LH
LL
X
Q0
HX
X
Z
H e High Level L e Low Level
X e Don’t Care
u e Transition from low-to-high
Z e High impedance state
Q0 e The level of the output before steady state
Input conditions were established
TRI-STATE
is a registered trademark of National Semiconductor Corp
C1995 National Semiconductor Corporation
RRD-B30M105Printed in U S A
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MM54HCT573 | 制造商:NSC 制造商全称:National Semiconductor 功能描述:TRI-STATE? Octal D-Type Latch / TRI-STATE Octal D-Type Flip-Flop |
| MM54HCT573N | 制造商:NSC 制造商全称:National Semiconductor 功能描述:TRI-STATE? Octal D-Type Latch / TRI-STATE Octal D-Type Flip-Flop |
| MM54HCT573WM | 制造商:NSC 制造商全称:National Semiconductor 功能描述:TRI-STATE? Octal D-Type Latch / TRI-STATE Octal D-Type Flip-Flop |
| MM54HCT574 | 制造商:NSC 制造商全称:National Semiconductor 功能描述:TRI-STATE? Octal D-Type Latch / TRI-STATE Octal D-Type Flip-Flop |
| MM54HCT574N | 制造商:NSC 制造商全称:National Semiconductor 功能描述:TRI-STATE? Octal D-Type Latch / TRI-STATE Octal D-Type Flip-Flop |
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