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参数资料
| 型号： | MM74C165N |
| 厂商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分类： | 计数移位寄存器 |
| 中文描述： | CMOS SERIES, 8-BIT RIGHT PARALLEL IN SERIAL OUT SHIFT REGISTER, COMPLEMENTARY OUTPUT, PDIP16 |
| 封装： | 0.300 INCH, PLASTIC, MS-001, DIP-16 |
| 文件页数： | 4/6页 |
| 文件大小： | 60K |
| 代理商： | MM74C165N |
www.fairchildsemi.com
4
M
74C165
AC Electrical Characteristics (Note 2)
TA = 25°C, CL = 50 pF, unless otherwise noted
Note 2: AC Parameters are guaranteed by DC correlated testing.
Note 3: Capacitance is guaranteed by periodic testing.
Note 4: CPD determines the no load AC power consumption of any CMOS device. For complete explanation see Family Characteristics application note
AN-90.
Switching Time Waveform
Note A: The remaining six data and the serial input are LOW.
Note B: Prior to test, HIGH level data is loaded into the P7 input.
Symbol
Parameter
Conditions
Min
Typ
Max
Units
tpd0, tpd1
Propagation Delay Time to a Logical “0” or VCC = 5V
200
400
ns
Logical “1” from Clock or Load to Q or Q
VCC = 10V
80
200
tpd0, tpd1
Propagation Delay Time to a Logical “0” or VCC = 5V
200
400
ns
Logical “1” from H to Q or Q
VCC = 10V
80
200
tS
Clock Inhibit Set-up Time
VCC = 5V
150
75
ns
VCC = 10V
60
30
tS
Serial Input Set-up Time
VCC = 5V
50
25
ns
VCC = 10V
30
15
tH
Serial Input Hold Time
VCC = 5V
50
0
ns
VCC = 10V
30
0
tS
Parallel Input Set-Up Time
VCC = 5V
150
75
ns
VCC = 10V
60
30
tH
Parallel Input Hold Time
VCC = 5V
50
0
ns
VCC = 10V
30
0
tW
Minimum Clock Pulse Width
VCC = 5V
70
200
ns
VCC = 10V
30
100
tW
Minimum Load Pulse Width
VCC = 5V
85
180
ns
VCC = 10V
30
90
fMAX
Maximum Clock Frequency
VCC = 5V
2.5
6
MHz
VCC = 10V
5
12
tr, tf
Maximum Clock Rise and Fall Time
VCC = 5V
10
s
VCC = 10V
5
CIN
Input Capacitance
(Note 3)
5
pF
CPD
Power Dissipation Capacitance
(Note 4)
65
pF
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