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| 型号： | MMA3202KEGR2 |
| 厂商： | Freescale Semiconductor |
| 文件页数： | 3/11页 |
| 文件大小： | 0K |
| 描述： | SENSOR ACCEL +/-100/50G 20-SOIC |
| 标准包装： | 1 |
| 轴： | X，Y |
| 加速范围： | ±112.5g，56.3g |
| 灵敏度： | 20mV/g，40mV/g |
| 电源电压： | 4.75 V ~ 5.25 V |
| 输出类型： | 线性 |
| 带宽： | 440Hz |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 20-SOIC（0.295"，7.50mm 宽） |
| 供应商设备封装： | 20-SOIC W |
| 其它名称： | MMA3202KEGR2DKR |
Table 2. Operating Characteristics
(Unless otherwise noted: –40°C ?? T A ?? +105°C, 4.75 ?? V DD ?? 5.25, Acceleration = 0g, Loaded output.) (1)
Characteristic
Symbol
Min
Typ
Max
Unit
Operating Range
(2)
Supply Voltage (3)
Supply Current
Operating Temperature Range
Acceleration Range X-axis
Acceleration Range Y-axis
V DD
I DD
T A
g FS
g FS
4.75
6
–40
—
—
5.00
8
—
112.5
56.3
5.25
10
+125
—
—
V
mA
°C
g
g
Output Signal
Zero g (T A = 25°C, V DD = 5.0 V) (4)
Zero g
Sensitivity X-axis (T A = 25°C, V DD = 5.0 V) (5)
Sensitivity Y-axis (T A = 25°C, V DD = 5.0 V)
Sensitivity X-axis
Sensitivity Y-axis
Bandwidth Response
Nonlinearity
V OFF
V OFF,V
S
S
S V
S V
f –3dB
NL OUT
2.35
0.46 V DD
19
38
3.72
7.44
360
–1.0
2.5
0.50 V DD
20
40
4
8
400
—
2.65
0.54 V DD
21
42
4.28
8.56
440
+1.0
V
V
mV/g
mV/g
mV/g/V
mV/g/V
Hz
% FSO
Noise
RMS (.01 Hz – 1 kHz)
Power Spectral Density
Clock Noise (without RC load on output) (6)
n RMS
n PSD
n CLK
—
—
—
—
110
2.0
2.8
—
—
mVrms
? V/(Hz 1/2 )
mVpk
Self-Test
Output Response (7)
Input Low
Input High
Input Loading (8)
Response Time (9)
g ST
V IL
V IH
I IN
t ST
9.6
V SS
0.7 ?? V DD
–30
—
12
—
—
–100
2.0
14.4
0.3 ?? V DD
V DD
–300
–
g
V
V
? A
ms
Status (10) (11)
Output Low (I load = 100 ? A)
Output High (I load = 100 ? A)
Minimum Supply Voltage (LVD Trip)
Clock Monitor Fail Detection Frequency
V OL
V OH
V LVD
f min
—
V DD – 0.8
2.7
50
—
—
3.25
—
0.4
—
4.0
260
V
V
V
kHz
Output Stage Performance
Electrical Saturation Recovery Time (12)
Full Scale Output Range (I OUT = 200 ? A)
Capacitive Load Drive (13)
Output Impedence
t DELAY
V FSO
C L
Z O
—
0.25
—
—
0.2
—
—
300
—
V DD – 0.25
100
—
ms
V
pF
?
Mechanical Characteristics
Transverse Sensitivity (14)
Package Resonance
V XZ,YZ
f PKG
—
—
—
10
5.0
—
% FSO
kHz
1. For a loaded output the measurements are observed after an RC filter consisting of a 1 k ? resistor and a 0.01 ? F capacitor to ground.
2. These limits define the range of operation for which the part will meet specification.
3. Within the supply range of 4.75 and 5.25 volts, the device operates as a fully calibrated linear accelerometer. Beyond these supply limits
the device may operate as a linear device but is not guaranteed to be in calibration.
4. The device can measure both + and – acceleration. With no input acceleration the output is at midsupply. For positive acceleration the output
will increase above V DD /2 and for negative acceleration the output will decrease below V DD /2.
5. The device is calibrated at 20g.
6. At clock frequency ? 70 kHz.
7. ? V OFF calculated with typical sensitivity.
8. The digital input pin has an internal pull-down current source to prevent inadvertent self test initiation due to external board level leakages.
9. Time for the output to reach 90% of its final value after a self-test is initiated.
10. The Status pin output is not valid following power-up until at least one rising edge has been applied to the self-test pin. The Status pin is
high whenever the self-test input is high, as a means to check the connectivity of the self-test and Status pins in the application.
11. The Status pin output latches high if a Low Voltage Detection or Clock Frequency failure occurs, or the EPROM parity changes to odd. The
Status pin can be reset low if the self-test pin is pulsed with a high input for at least 100 ? s, unless a fault condition continues to exist.
12. Time for amplifiers to recover after an acceleration signal causing them to saturate
13. Preserves phase margin (60°) to guarantee output amplifier stability.
14. A measure of the device's ability to reject an acceleration applied 90° from the true axis of sensitivity.
MMA3202KEG
Sensors
Freescale Semiconductor, Inc.
3
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