Chapter 18 Appendices
XVIII - 14
Special Function Registers List
0
X'3FE4'
X'3FE5'
X'3FE6'
IRQ2LV1
IRQ2LV0
REDG2
-
IRQ2IE
IRQ2IR
IRQ2ICR
Request IRQ2
Interrupt
III - 19
Enable IRQ2
Interrupt
IRQ2 Interrupt
Valid Edge
Specify IRQ2 Interrupt Level
IRQ3LV1
IRQ3LV0
REDG3
-
IRQ3IE
IRQ3IR
IRQ3ICR
III - 20
IRQ4LV1
IRQ4LV0
Reserved
-
IRQ4IE
IRQ4IR
IRQ4ICR
III - 21
--
-
--
-
--
-
IRQ3 Interrupt
Valid Edge
Fixed to "0"
Specify IRQ3 Interrupt Level
Specify IRQ4 Interrupt Level
Request IRQ3
Interrupt
Enable IRQ3
Interrupt
Request IRQ4
Interrupt
Enable IRQ4
Interrupt
Note) x : Initial value is unstable. - : No register is allocated.
0
X'3FE9'
X'3FEA'
TM0LV1
TM0LV0
-
TM0IE
TM0IR
TM0ICR
Request TM0
Interrupt
III - 22
Enable TM0
Interrupt
TM1LV1
TM1LV0
-
TM1IE
TM1IR
III - 23
TM1ICR
--
-
--
-
Specify TM0 Interrupt Level
Specify TM1 Interrupt Level
00
0
Request TM1
Interrupt
Enable TM1
Interrupt
0
00
0
X'3FD9'
X'3FDA'
X'3FDB'
X'3FDC'
LCDEN
LCREN
LCDTY1
LCDTY0
LCDCK3
LCDCK2
LCDCK1
LCDCK0
LCDMD1
LCD Clock Source Selection
LCD Display Duty Selection
LCD Driver
Circuit Start
Internal voltage
divider resistor
selection
XIV - 6
COMSL3
COMSL2
COMSL1
COMSL0
-
LCRHL
Reserved
X'3FE1'
LCDMD2
Set always
to "0".
Internal Voltage
Booster Resistor
Selection
COM3/Port 33
Selection
SEG22 to 23/
Port 61 to 60
Selection
SEG20 to 21/
Port 63 to 62
Selection
SEG18 to 19/
Port 65 to 64
Selection
SEG16 to 17/
Port 67 to 66
Selection
SEG12 to 15/
Port 73 to 70
Selection
SEG8 to 11/
Port 77 to 74
Selection
SEG4 to 7/
Port 83 to 80
Selection
SEG0 to 3/
Port 87 to 84
Selection
SEG31/
Port 40
Selection
SEG30/
Port 41
Selection
SEG29
Port 42
Selection
SEG28
Port 43
Selection
SEG27
Port 44
Selection
SEG26
Port 45
Selection
SEG25
Port 46
Selection
SEG24
Port 47
Selection
COM2/Port 32
Selection
COM0/Port 30
Selection
XIV - 7
IV - 23
XIV - 9
IV - 28
XIV - 8
IV - 36,40,44
LC1SL7
LC1SL6
LC1SL5
LC1SL4
LC1SL3
LC1SL2
LC1SL1
LC1SL0
X'3FE2'
LCCTR1
X'3FE3'
LCCTR2
-
PIR
WDIR
RESERVED
NMICR
Program
Interrupt
Request
III - 16
Fixed to "0"
Watchdog Timer
Interrupt
Request
IRQ0LV1
IRQ0LV0
REDG0
-
IRQ0IE
IRQ0IR
IRQ0ICR
Request IRQ0
Interrupt
III - 17
Enable IRQ0
Interrupt
IRQ0 Interrupt
Valid Edge
Specify IRQ0 Interrupt Level
IRQ1LV1
IRQ1LV0
REDG1
-
IRQ1IE
IRQ1IR
IRQ1ICR
III - 18
IRQ1 Interrupt
Valid Edge
Specify IRQ1 Interrupt Level
--
-
--
-
---
-
000
0
-
0
00
0
00
0
00
0
LC2SL7
LC2SL6
LC2SL5
LC2SL4
LC2SL3
LC2SL2
LC2SL1
LC2SL0
00
0
Request IRQ1
Interrupt
Enable IRQ1
Interrupt
COM1/Port 31
Selection
0
X'3FB2'
ANST
RESERVED
-
----
ANCTR2
A/D Conversion
Status
XIII - 6
Fixed to "0"
------
Bit Symbol / Initial Value / Description
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Page
Address
Register
X'3FB3'
X'3FB4'
ANBUF07
ANBUF06
ANBUF0
A/D Conversion Data Storage
Register (Lower 2 bits)
XIII- 7
ANBUF17
ANBUF16
ANBUF15
ANBUF14
ANBUF13
ANBUF12
ANBUF11
ANBUF10
ANBUF1
A/D Conversion Data Storage Register (Upper 8 bits)
XIII - 7
-
----
-
----
x
xx
x
0
X'3FEB'
X'3FEC'
TM2LV1
TM2LV0
-
TM2IE
TM2IR
III - 24
TM2ICR
TM3LV1
TM3LV0
-
TM3IE
TM3IR
III - 25
TM3ICR
--
-
--
-
Specify TM2 Interrupt Level
Specify TM3 Interrupt Level
Request TM2
Interrupt
Enable TM2
Interrupt
Request TM3
Interrupt
Enable TM3
Interrupt
Set always
to "0".