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参数资料
| 型号： | MN103SF57G |
| 厂商： | PANASONIC CORP |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 32-BIT, FLASH, 40 MHz, MICROCONTROLLER, PQFP100 |
| 封装： | 14 X 14 MM, LEAD FREE, PLASTIC, LQFP-100 |
| 文件页数： | 1/3页 |
| 文件大小： | 327K |
| 代理商： | MN103SF57G |
MAF00009GEM
MN103S57 Series
Type
MN103S57G
MN103SF57G
Internal ROM type
Mask ROM
FLASH
ROM (byte)
128K
RAM (byte)
16K
Package (Lead-free)
LQFP100-P-1414A
Minimum Instruction
Execution Time
25.0 ns (at 3.0 V to 3.6 V, 40 MHz)
Interrupts
RESET. IRQ × 8. NMI. Timer × 28. I2C × 2. SIF × 10. DMA × 12. WDT. A/D. System error
Timer Counter
8-bit timer × 10
Reload-down count. Cascade connection possible (usable as a 16-bit to 32-bit timer)
16-bit timer × 6
Up-down count. Input capture. PWM output. Compare/capture register 2 channnels
Watchdog timer × 1
Serial interface
UART/Synchronous/Multi-master I2C interface selective × 2
UART/Synchronous interface selective × 3
DMA controller
Number of channels: 4 channels
Unit of transfer: 8/16/32 bits
Maximum transfer cycles: 65535
Starting factor: External interrupt. Timer. Serial transmission/reception. A/D conversion nish. I2C transmission/reception. External
transmission request. Software
Transfer method: 2-bus cycle transfer
Adressing modes: Fixed. Increment. Decrement
Transfer mode: Word transfer. Burst transfer. Intermittent transfer
Extended Calculation
Multiply and accumulate arithmetic. Multiplication. Saturated arithmetic
I/O Pins
I/O
73 : Common use
A/D converter
10-bit × 12 channels
ROM Correction
4 channels
Electrical Charactreistics (A/D converter characteristics)
Parameter
Symbol
Condition
Limit
Unit
min
typ
max
Non-linear error
10-bit. VREFH = 3.3 V
±
4
LSB
A/D conversion time
IOCLK = 20 MHz. T
AD = 200 ns
2.4
s
Analog input voltage
AVSS
VREFH V
Ta = 25 °C. VDD = PVDD = AVDD = 3.3 V. VSS = PVSS = AVSS = 0 V
Note) T
AD is A/D conversion clock cycle
Development tools
In-circuit Emulator
PX-ICE-103S57
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