参数资料
型号: MN103SG20L
厂商: PANASONIC CORP
元件分类: 微控制器/微处理器
英文描述: 32-BIT, MROM, 48 MHz, MICROCONTROLLER, PQFP100
封装: 18 X 18 MM, LEAD FREE, PLASTIC, QFP-100
文件页数: 1/3页
文件大小: 342K
代理商: MN103SG20L
MAF00031BEM
MN103SG2 Series
Type
MN103SG20L
Internal ROM type
External
ROM (byte)
RAM (byte)
32K
Package (Lead-free)
QFP100-P-1818B (Under development)
Minimum Instruction
Execution Time
20.9 ns (at 3.0 V to 3.6 V, 48 MHz)
Interrupts
RESET. IRQ × 4. Timer × 12. I2C × 13. SIF × 10. DMA × 12. Stream DMA × 1. WDT. System error. USB × 2. SDIO × 2. I2S × 1
Timer Counter
8-bit timer × 6
Reload-down count. Cascade connection possible (usable as a 16-bit to 32-bit timer)
16-bit timer × 2
Up-down count. Input capture. PWM output. Compare/capture register 2 channnels
Watchdog timer × 1
Serial interface
Multi-master I2C × 3
UART/Synchronous interface selective × 5
Audio Output Interface
I2S interface × 1
DMA controller
Number of channels: 4 channels
Unit of transfer: 8/16/32 bits
Maximum transfer cycles: 65535
Starting factor: External interrupt. Timer. Serial transmission/reception. I2C transmission/reception. Software. USB transmission/reception
end. I2S empty. SD transmission/reception
Transfer method: 2-bus cycle transfer
Adressing modes: Fixed. Increment. Decrement
Transfer mode: Word transfer. Burst transfer. Intermittent transfer
Stream DMA controller
Number of channels: 1 channels
Unit of transfer: 8/32 bits
Maximum transfer cycles: 65535
Transfer source: Interface RAM
Transfer destination: Serial I/F. Audio output interface
USB HOST Controller
Conforms to USB 2.0: Full-speed (12 Mbps) supported
OHCI R1.0a standard conforming. External power supply control function. USB transceiver built-in
SD HOST Interface
Conforms to SD HOST Controller Standard Specication Ver 1.00
Correspond with Single Block transfer, Multiple Block transfer
Operation frequency: Max. 24 MHz
I/O Pins
I/O
43 : (3 V I/O) Common use
1 : (3 V I/O) Exclusive
Development tools
On-board Development Tools
PX-PAC-NUT103S-DT (with trace unit)
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