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参数资料
| 型号： | MN74HC563 |
| 厂商： | PANASONIC CORP |
| 元件分类： | 总线收发器 |
| 英文描述： | DRIVER, PDIP20 |
| 封装： | PLASTIC,DIP-20 |
| 文件页数： | 5/5页 |
| 文件大小： | 336K |
| 代理商： | MN74HC563 |
September 1993
5
Philips Semiconductors
Product specication
Quad 64-bit static shift register
74HC/HCT7731
DC CHARACTERISTICS FOR 74HC
For the DC characteristics see
“74HC/HCT/HCU/HCMOS Logic Family Specifications”.
Output capability: standard
ICC category: LSI.
AC CHARACTERISTICS FOR 74HC
GND = 0 V; tr = tf = 6 ns; CL = 50 pF.
Note
1. The maximum power dissipation has to be observed. See power dissipation information.
SYMBOL
PARAMETER
Tamb (°C)
UNIT
TEST CONDITION
+25
40 to +85
40 to +125
VCC
(V)
WAVEFORMS
MIN
TYP
MAX
MIN
MAX
MIN
MAX
tPHL/tPLH
propagation
delay time CP
to Qn
50
18
15
155
31
26
190
38
32
230
46
39
ns
2.0
4.5
6.0
Fig.4
tTHL/tTLH
output transition
time
19
7
6
75
15
13
90
18
15
110
22
19
ns
2.0
4.5
6.0
Fig.4
tW
clock pulse
width
HIGH or LOW
80
16
14
19
7
6
100
20
17
120
24
20
ns
2.0
4.5
6.0
Fig.4
tsu
set-up time Dn
to CPn
60
12
10
8
3
75
15
13
90
18
15
ns
2.0
4.5
6.0
Fig.4
tsu
set-up time
RECn to CPn
75
15
13
22
8
7
90
18
15
110
22
19
ns
2.0
4.5
6.0
Fig.5
th
hold time Dn to
CPn
25
5
4
3
1
30
6
5
35
7
6
ns
2.0
4.5
6.0
Fig.4
th
hold time RECn
to CPn
10
2
8
3
10
2
15
3
ns
2.0
4.5
6.0
Fig.5
fmax
maximum clock
pulse frequency
6
30
35
26
78
93
4.8
24
28
4
20
23
MHz
MHZ
MHz
2.0
4.5
6.0
Fig.4 (note 1)
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