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参数资料
| 型号： | MP8650DN-Z |
| 厂商： | MONOLITHIC POWER SYSTEMS INC |
| 元件分类： | 稳压器 |
| 英文描述： | 19 A SWITCHING REGULATOR, 400 kHz SWITCHING FREQ-MAX, QCC20 |
| 封装： | 3 X 4 MM, MO-220VGED, QFN-20 |
| 文件页数： | 3/8页 |
| 文件大小： | 233K |
| 代理商： | MP8650DN-Z |
MP8650 – 15A, 28V, HIGH FREQUENCY STEP-DOWN WITH SYNCHRONOUS GATE DRIVER
MP8650 Rev. 0.2
www.MonolithicPower.com
3
12/13/2007
MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited.
2007 MPS. All Rights Reserved.
ELECTRICAL CHARACTERISTICS
VIN = 12V, TA = +25°C, unless otherwise noted.
Parameters
Symbol Condition
Min
Typ
Max
Units
Power Good Delay
20
μs
Power Good Sink Current Capability
VPG
Sink 4mA
0.4
V
Power Good Leakage Current
IPG_LEAK VPG = 3.3V
10
nA
VCC Tolerance
VCC
ICC = 0mA
4.5
5
5.5
V
VCC Regulation
ICC = 0~20mA
5
%
Sync Frequency
FSYNC
0.3
TBD
MHz
SYNCIN Bias Current
ISYNCIN
10
nA
SYNCIN Logic High Voltage
1.2
V
SYNCIN Logic Low Voltage
0.4
V
SYNCHOUT High Level
VCC = 5V, Source
5mA
4.6
V
SYNCHOUT Low Level
VCC = 5V, Sink 5mA
0.4
V
Under Voltage Lockout Threshold Rising
3.75
4.0
4.25
V
Under Voltage Lockout Threshold Hysteresis
880
mV
EN Input Low Voltage
0.4
V
En Input High Voltage
1.2
V
VEN = 2V
2
EN Input Current
VEN = 0V
0
μA
Supply Current (Shutdown)
VEN = 0V
0
μA
Supply Current (Quiescent)
VEN = 2V, VFB = 1V
1.2
mA
Thermal Shutdown
150
°C
Gate Driver Sink Impedance
RSINK
1
Gate Driver Source Impedance
RSOURCE
4
Gate Drive Current Sense Trip Threshold
20
mV
Td1
From BG low to SW
high
10
ns
Gate Drive Non-Overlap Time
(see Figure 1)
Td2
From SW low to BG
high
10
ns
Note:
4) Guaranteed by design.
VBG
1V
Td1
Td2
1V
VSW
Figure 1—Gate Drive Non-Overlap Time Diagram
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