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参数资料
| 型号： | MPC17C724EPR2 |
| 厂商： | Freescale Semiconductor |
| 文件页数： | 8/15页 |
| 文件大小： | 0K |
| 描述： | IC MOTOR DVR H-BRIDGE DL 16QFN |
| 标准包装： | 1 |
| 应用： | DC 电机驱动器，步进电机驱动器，H 桥式 |
| 评估套件： | 可供 |
| 输出数： | 1 或 2 |
| 电流 - 输出： | 400mA |
| 电压 - 负载： | 2.7 V ~ 5.5 V |
| 电源电压： | 2.7 V ~ 5.5 V |
| 工作温度： | -20°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-VFQFN 裸露焊盘 |
| 供应商设备封装： | 16-QFN-EP（3x3） |
| 包装： | 标准包装 |
| 其它名称： | MPC17C724EPR2DKR |
FUNCTIONAL DESCRIPTION
INTRODUCTION
FUNCTIONAL DESCRIPTION
INTRODUCTION
The 17C724 is a monolithic dual H-Bridge that is ideal in
portable electronic applications to control bipolar step motors
and brush DC motors, such as those used in camera lens and
shutters. The 17C724 can operate efficiently with supply
voltages as low as 2.7 V to as high as 5.5 V, and provide
continuous motor drive currents of 0.4 A while handling peak
currents up to 0.8 A. It is easily interfaced to low cost MCUs
via parallel 3.0 V or 5.0 V compatible logic. The device can be
pulse width modulated (PWM’ed) at up to 200 kHz.
The 17C724 can drive two motors simultaneously (see
parallel drive is also possible if higher current drive is desired
(0.8 A). Two-motor operation is accomplished by hooking
one motor between OUT1A and OUT1B, and the other motor
between OUT2A and OUT2B.
This IC has a built-in shoot-through current protection
circuit and undervoltage detector to avoid malfunction. It also
allows for power-conserving Sleep mode by the setting of the
PSAVE pin (refer to Table 5, Truth Table , page 7 ).
The device features four operating modes: forward,
reverse, brake, and tri-stated (high-impedance).
the simplified application diagram on page 1 . Dual channel
FUNCTIONAL PIN DESCRIPTION
LOGIC CIRCUIT POWER SUPPLY (VDD)
The VDD pin carries the power source connection to the
control (logic) circuit, and its input range is between 2.7 V to
5.5 V (3.0 V and 5.0 V compatible). V DD has an undervoltage
threshold. If the supply voltage to V DD drops below 2.0 V
(typical), then all the output of H-Bridges (OUT1A, OUT1B,
OUT2A, OUT2B) will become open (high impedance = Z).
When the supply voltage returns to a level that is above the
threshold voltage the H-Bridge outputs automatically resume
normal operation according to the established condition of
the input pins.
LOGIC INPUT CONTROL (IN1A, IN1B, IN2A, AND
IN2B)
These logic input pins control each H-Bridge output. For
example, IN1A logic HIGH = OUT1A HIGH; likewise, IN1B
logic HIGH = OUT1B HIGH. If both A and B inputs are HIGH,
INPUT ENABLE CONTROL (PSAVE)
The PSAVE input controls the functioning of the power
output stages (the H-Bridges). When it is set logic LOW, the
output stages are enabled and the H-Bridges function
normally. When it is set logic HIGH, the output stages are
disabled and all the outputs are opened (high impedance). In
this mode, the built-in low voltage detection circuit is disabled.
H-BRIDGE OUTPUT (OUT1A, OUT1B, OUT2A, AND
OUT2B)
These pins are the outputs of the power MOSFET
H-Bridges. OUT1 is from H-Bridge Channel 1, and OUT2
from H-Bridge Channel 2. These pins will typically connect to
an external load (step motor or brush DC motors).
MOTOR DRIVER POWER SUPPLY (VM1 AND VM2)
VM1 and VM2 carries the main supply voltage and current
into the power sections (the H-Bridges) of the IC. Both of
these pins are connected internally but they must be
connected together on the printed circuit board with as short
as possible traces. The input range is 2.7 V to 5.5 V.
POWER GROUND (PGND1 AND PGND2)
These two are the power ground pins that connect to the
power ground of the H-Bridges. The power grounds are for
higher current handling capability from loads and they must
be connected together on the PCB.
LOGIC GROUND (LGND)
LGND is the logic ground pin and its current handling level
is lower than the PGND.
17C724
Analog Integrated Circuit Device Data
8
Freescale Semiconductor
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