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参数资料
| 型号： | MPC5554INT |
| 厂商： | Freescale Semiconductor |
| 文件页数： | 3/58页 |
| 文件大小： | 0K |
| 描述： | BOARD DEMO MPC5554 |
| 产品培训模块： | MPC55xx PitchPak Family |
| 标准包装： | 1 |
| 系列： | Qorivva |
| 类型： | MCU |
| 适用于相关产品： | MPC5554 |
| 所含物品： | 板 |
| 相关产品： | MPC5554MZP132R2-ND - IC MCU 2M FLASH 132MHZ 416-PBGA MPC5554MZP132-ND - IC MCU 2M FLASH 132MHZ 416-PBGA MPC5554MVR132R2-ND - IC MCU 2M FLASH 132MHZ 416-PBGA MPC5554MVR132-ND - IC MCU 2M FLASH 132MHZ 416-PBGA MPC5554AZP132-ND - IC MPU 2M FLASH 132MHZ 416-PBGA |
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Electrical Characteristics
MPC5554 Microcontroller Data Sheet, Rev. 4
Freescale Semiconductor
11
Furthermore, when all of the PORs negate, the system clock starts to toggle, adding another large increase
of the current consumed by VRC33. If VRC33 lags VDDSYN by more than 100 mV, the increase in current
consumed can drop VDD low enough to assert the 1.5 V POR again. Oscillations are possible when the
1.5 V POR asserts and stops the system clock, causing the voltage on VDD to rise until the 1.5 V POR
negates again. All oscillations stop when VRC33 is powered sufficiently.
When powering down, VRC33 and VDDSYN have no delta requirement to each other, because the bypass
capacitors internal and external to the device are already charged. When not powering up or down, no delta
between VRC33 and VDDSYN is required for the VRC to operate within specification.
There are no power up/down sequencing requirements to prevent issues such as latch-up, excessive current
spikes, and so on. Therefore, the state of the I/O pins during power up and power down varies depending
on which supplies are powered.
Table 7 gives the pin state for the sequence cases for all pins with pad type pad_fc (fast type).
Table 8 gives the pin state for the sequence cases for all pins with pad type pad_mh (medium type) and
pad_sh (slow type).
The values in Table 7 and Table 8 do not include the effect of the weak-pull devices on the output pins
during power up.
Before exiting the internal POR state, the voltage on the pins go to a high-impedance state until POR
negates. When the internal POR negates, the functional state of the signal during reset applies and the
weak-pull devices
(up or down) are enabled as defined in the device reference manual. If VDD is too low to correctly
propagate the logic signals, the weak-pull devices can pull the signals to VDDE and VDDEH.
Table 7. Pin Status for Fast Pads During the Power Sequence
VDDE
VDD33
VDD
POR
Pin Status for Fast Pad Output Driver
pad_fc (fast)
Low
—
Asserted
Low
VDDE
Low
Asserted
High
VDDE
Low
VDD
Asserted
High
VDDE
VDD33
Low
Asserted
High impedance (Hi-Z)
VDDE
VDD33
VDD
Asserted
Hi-Z
VDDE
VDD33
VDD
Negated
Functional
Table 8. Pin Status for Medium and Slow Pads During the Power Sequence
VDDEH
VDD
POR
Pin Status for Medium and Slow Pad Output Driver
pad_mh (medium) pad_sh (slow)
Low
—
Asserted
Low
VDDEH
Low
Asserted
High impedance (Hi-Z)
VDDEH
VDD
Asserted
Hi-Z
VDDEH
VDD
Negated
Functional
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相关代理商/技术参数 |
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| MPC5554MVR112 | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:Microcontroller |
| MPC5554MVR132 | 功能描述:32位微控制器 - MCU MPC5554 COPPERHEAD Qorivva RoHS:否 制造商:Texas Instruments 核心:C28x 处理器系列:TMS320F28x 数据总线宽度:32 bit 最大时钟频率:90 MHz 程序存储器大小:64 KB 数据 RAM 大小:26 KB 片上 ADC:Yes 工作电源电压:2.97 V to 3.63 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:LQFP-80 安装风格:SMD/SMT |
| MPC5554MVR132R2 | 功能描述:32位微控制器 - MCU COPPERHEAD Qorivva RoHS:否 制造商:Texas Instruments 核心:C28x 处理器系列:TMS320F28x 数据总线宽度:32 bit 最大时钟频率:90 MHz 程序存储器大小:64 KB 数据 RAM 大小:26 KB 片上 ADC:Yes 工作电源电压:2.97 V to 3.63 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:LQFP-80 安装风格:SMD/SMT |
| MPC5554MVR80 | 制造商:Freescale Semiconductor 功能描述:MCU 32BIT 55XX RISC 2MB FLASH 1.8V/2.5V/3.3V/5V 416BGA - Trays |
| MPC5554MVR80R2 | 制造商:Freescale Semiconductor 功能描述:MCU 32BIT 55XX RISC 2MB FLASH 1.8V/2.5V/3.3V/5V 416BGA - Tape and Reel |
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