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参数资料
型号： MPC8315VRAFDA
厂商： FREESCALE SEMICONDUCTOR INC
元件分类： 微控制器/微处理器
英文描述： 32-BIT, 333 MHz, MICROPROCESSOR, PBGA620
封装： 29 X 29 MM, 2.23 MM HEIGHT, 1 MM PITCH, LEAD FREE, TEPBGAII-620
文件页数： 24/112页
文件大小： 1283K
代理商： MPC8315VRAFDA
MPC8315E PowerQUICC II Pro Processor Hardware Specifications, Rev. 0
Freescale Semiconductor
19
DDR and DDR2 SDRAM
Table 12 provides the DDR2 capacitance when GVDD(typ) = 1.8 V.
Table 13 provides the recommended operating conditions for the DDR SDRAM component(s) of the
MPC8315E when GVDD(typ) = 2.5 V.
Output low current (VOUT = 0.280 V)
IOL
13.4
—
mA
Notes:
1. GVDD is expected to be within 50 mV of the DRAM GVDD at all times.
2. MVREF is expected to be equal to 0.5
× GVDD, and to track GVDD DC variations as measured at the receiver.
Peak-to-peak noise on MVREF may not exceed ±2% of the DC value.
3. VTT is not applied directly to the device. It is the supply to which far end signal termination is made and is expected to be
equal to MVREF. This rail should track variations in the DC level of MVREF.
4. Output leakage is measured with all outputs disabled, 0 V
≤ VOUT ≤ GVDD.
Table 12. DDR2 SDRAM Capacitance for GVDD(typ) = 1.8 V
Parameter/Condition
Symbol
Min
Max
Unit
Notes
Input/output capacitance: DQ, DQS
CIO
68
pF
1
Delta input/output capacitance: DQ, DQS
CDIO
—0.5
pF
1
Note:
1. This parameter is sampled. GVDD = 1.8 V ± 0.090 V, f = 1 MHz, TA = 25°C, VOUT = GVDD/2, VOUT (peak-to-peak) = 0.2 V.
Table 13. DDR SDRAM DC Electrical Characteristics for GVDD(typ) = 2.5 V
Parameter/Condition
Symbol
Min
Max
Unit
Notes
I/O supply voltage
GVDD
2.3
2.7
V
1
I/O reference voltage
MVREF
0.49
× GVDD
0.51
× GVDD
V
2
I/O termination voltage
VTT
MVREF – 0.04
MVREF + 0.04
V
3
Input high voltage
VIH
MVREF + 0.15
GVDD + 0.3
V
—
Input low voltage
VIL
–0.3
MVREF – 0.15
V
—
Output leakage current
IOZ
–9.9
μA4
Output high current (VOUT = 1.95 V,
GVDD = 2.3V)
IOH
–16.2
—
mA
—
Output low current (VOUT = 0.35 V)
IOL
16.2
—
mA
—
Notes:
1. GVDD is expected to be within 50 mV of the DRAM GVDD at all times.
2. MVREF is expected to be equal to 0.5
× GVDD, and to track GVDD DC variations as measured at the receiver.
Peak-to-peak noise on MVREF may not exceed ±2% of the DC value.
3. VTT is not applied directly to the device. It is the supply to which far end signal termination is made and is expected to be
equal to MVREF. This rail should track variations in the DC level of MVREF.
4. Output leakage is measured with all outputs disabled, 0 V
≤ VOUT ≤ GVDD.
Table 11. DDR2 SDRAM DC Electrical Characteristics for GVDD(typ) = 1.8 V (continued)
Parameter/Condition
Symbol
Min
Max
Unit
Notes
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相关代理商/技术参数
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MPC8315VRAGDA 功能描述:微处理器 - MPU NON-ENCRYPT RoHS:否 制造商:Atmel 处理器系列:SAMA5D31 核心:ARM Cortex A5 数据总线宽度:32 bit 最大时钟频率:536 MHz 程序存储器大小:32 KB 数据 RAM 大小:128 KB 接口类型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作电源电压:1.8 V to 3.3 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-324
MPC8321CVRADDC 功能描述:微处理器 - MPU 8321 NOPB PBGA W/O ENCR RoHS:否 制造商:Atmel 处理器系列:SAMA5D31 核心:ARM Cortex A5 数据总线宽度:32 bit 最大时钟频率:536 MHz 程序存储器大小:32 KB 数据 RAM 大小:128 KB 接口类型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作电源电压:1.8 V to 3.3 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-324
MPC8321CVRADDC 制造商:Freescale Semiconductor 功能描述:Embedded Networking Processor
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