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参数资料
| 型号： | MPC8347ECVVAJFB |
| 厂商： | FREESCALE SEMICONDUCTOR INC |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 32-BIT, 533 MHz, MICROPROCESSOR, PBGA672 |
| 封装： | 35 X 35 MM, 1.46 MM HEIGHT, 1 MM PITCH, LEAD FREE, TBGA-672 |
| 文件页数： | 97/98页 |
| 文件大小： | 1084K |
| 代理商： | MPC8347ECVVAJFB |
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MPC8347EA PowerQUICC II Pro Integrated Host Processor Hardware Specifications, Rev. 11
Freescale Semiconductor
97
Document Revision History
3
11/2006
Updated note in introduction.
In the features list in Section 1, “Overview,” updated DDR data rate to show 266 MHz for PBGA
parts for all silicon revisions, and 400 MHz for DDR2 for TBGA parts for silicon Rev. 2 and 3.
In Table 5, “MPC8347EA Typical I/O Power Dissipation,” added GVDD 1.8-V values for DDR2;
added table footnote to designate rates that apply only to the TBGA package.
In Section 23, “Ordering Information,” replicated note from document introduction.
2
8/2006
Changed all references to revision 2.0 silicon to revision 3.0 silicon.
Changed VIH minimum value in Table 39, “JTAG Interface DC Electrical Characteristics,” to
OVDD –0.3.
In Table 40, “PCI DC Electrical Characteristics,” changed high-level input voltage values to min
= 2 and max = OVDD + 0.3; changed low-level input voltage values to min = (–0.3) and max = 0.8.
In Table 44, “PCI DC Electrical Characteristics,” changed high-level input voltage values to min
= 2 and max = OVDD + 0.3; changed low-level input voltage values to min = (–0.3) and max = 0.8.
Updated DDR2 I/O power values in Table 5, “MPC8347EA Typical I/O Power Dissipation.”
In Table 63, “Suggested PLL Configurations,” deleted reference-number rows 902 and 703.
1
4/2006
Removed Table 20, “Timing Parameters for DDR2-400.”
Changed ADDR/CMD to ADDR/CMD/MODT in Table 9, “DDR and DDR2 SDRAM Output AC
Timing Specifications,” rows 2 and 3, and in Figure 2, “DDR SDRAM Output Timing Diagram.
Changed Min and Max values for VIH and VIL in Table 40,“PCI DC Electrical Characteristics.”
In Table 51, “MPC8347EA (TBGA) Pinout Listing,” and Table 52, “MPC8347EA (PBGA) Pinout
Listing,” modified rows for MDICO and MDIC1 signals and added note ‘It is recommended that
MDICO be tied to GRD using an 18
Ω resistor and MCIC1 be tied to DDR power using an 18 Ω
resistor.’
In Table 51, “MPC8347EA (TBGA) Pinout Listing,” and Table 52, “MPC8347EA (PBGA) Pinout
Listing,” in row AVDD3 changed power supply from “AVDD3” to ‘—.’
0
3/2006
Initial public release.
Table 72. Document Revision History (continued)
Rev.
Number
Date
Substantive Change(s)
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PDF描述 |
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| MPC8347EVRAGDB | 32-BIT, 400 MHz, MICROPROCESSOR, PBGA620 |
| MPC8347EZQADFB | 32-BIT, 266 MHz, MICROPROCESSOR, PBGA620 |
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MPC8347ECVVALDB | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:MPC8347EA PowerQUICC II Pro Integrated Host Processor Hardware Specifications |
| MPC8347ECVVALFB | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:MPC8347EA PowerQUICC II Pro Integrated Host Processor Hardware Specifications |
| MPC8347ECZQADDB | 功能描述:微处理器 - MPU 8347 PBGA ENCRYP W/ PB RoHS:否 制造商:Atmel 处理器系列:SAMA5D31 核心:ARM Cortex A5 数据总线宽度:32 bit 最大时钟频率:536 MHz 程序存储器大小:32 KB 数据 RAM 大小:128 KB 接口类型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作电源电压:1.8 V to 3.3 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-324 |
| MPC8347ECZQADFB | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:MPC8347EA PowerQUICC II Pro Integrated Host Processor Hardware Specifications |
| MPC8347ECZQAGD | 功能描述:IC MPU PWRQUICC II PRO 620-PBGA RoHS:否 类别:集成电路 (IC) >> 嵌入式 - 微处理器 系列:MPC83xx 标准包装:1 系列:MPC85xx 处理器类型:32-位 MPC85xx PowerQUICC III 特点:- 速度:1.2GHz 电压:1.1V 安装类型:表面贴装 封装/外壳:783-BBGA，FCBGA 供应商设备封装:783-FCPBGA（29x29） 包装:托盘 |
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