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参数资料
| 型号： | MPC8349CVVAGDB |
| 厂商： | FREESCALE SEMICONDUCTOR INC |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 32-BIT, 400 MHz, MICROPROCESSOR, PBGA672 |
| 封装： | 35 X 35 MM, 1.46 MM HEIGHT, 1 MM PITCH, LEAD FREE, TBGA-672 |
| 文件页数： | 6/87页 |
| 文件大小： | 1037K |
| 代理商： | MPC8349CVVAGDB |
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MPC8349EA PowerQUICC II Pro Integrated Host Processor Hardware Specifications, Rev. 12
14
Freescale Semiconductor
RESET Initialization
5.2
RESET AC Electrical Characteristics
Table 10 provides the reset initialization AC timing specifications of the MPC8349EA.
Output low voltage
VOL
IOL = 3.2 mA
—
0.4
V
Notes:
1. This table applies for pins PORESET, HRESET, SRESET, and QUIESCE.
2. HRESET and SRESET are open drain pins, thus VOH is not relevant for those pins.
Table 10. RESET Initialization Timing Specifications
Parameter
Min
Max
Unit
Notes
Required assertion time of HRESET or SRESET (input) to activate reset flow
32
—
tPCI_SYNC_IN
1
Required assertion time of PORESET with stable clock applied to CLKIN when the
MPC8349EA is in PCI host mode
32
—
tCLKIN
2
Required assertion time of PORESET with stable clock applied to PCI_SYNC_IN
when the MPC8349EA is in PCI agent mode
32
—
tPCI_SYNC_IN
1
HRESET/SRESET assertion (output)
512
—
tPCI_SYNC_IN
1
HRESET negation to SRESET negation (output)
16
—
tPCI_SYNC_IN
1
Input setup time for POR configuration signals (CFG_RESET_SOURCE[0:2] and
CFG_CLKIN_DIV) with respect to negation of PORESET when the MPC8349EA is
in PCI host mode
4—
tCLKIN
2
Input setup time for POR configuration signals (CFG_RESET_SOURCE[0:2] and
CFG_CLKIN_DIV) with respect to negation of PORESET when the MPC8349EA is
in PCI agent mode
4—
tPCI_SYNC_IN
1
Input hold time for POR configuration signals with respect to negation of HRESET
0—
ns
—
Time for the MPC8349EA to turn off POR configuration signals with respect to the
assertion of HRESET
—4
ns
3
Time for the MPC8349EA to turn on POR configuration signals with respect to the
negation of HRESET
1—
tPCI_SYNC_IN
1, 3
Notes:
1. tPCI_SYNC_IN is the clock period of the input clock applied to PCI_SYNC_IN. In PCI host mode, the primary clock is applied
to the CLKIN input, and PCI_SYNC_IN period depends on the value of CFG_CLKIN_DIV. See the MPC8349EA
PowerQUICC II Pro Integrated Host Processor Family Reference Manual.
2. tCLKIN is the clock period of the input clock applied to CLKIN. It is valid only in PCI host mode. See the MPC8349EA
PowerQUICC II Pro Integrated Host Processor Family Reference Manual.
3. POR configuration signals consist of CFG_RESET_SOURCE[0:2] and CFG_CLKIN_DIV.
Table 9. RESET Pins DC Electrical Characteristics1 (continued)
Parameter
Symbol
Condition
Min
Max
Unit
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MPC8349CVVAGFB | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:Integrated Host Processor Hardware Specifications |
| MPC8349CVVAJDB | 功能描述:微处理器 - MPU 8349 TBGA NO PB W/O ENC RoHS:否 制造商:Atmel 处理器系列:SAMA5D31 核心:ARM Cortex A5 数据总线宽度:32 bit 最大时钟频率:536 MHz 程序存储器大小:32 KB 数据 RAM 大小:128 KB 接口类型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作电源电压:1.8 V to 3.3 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-324 |
| MPC8349CVVAJFB | 功能描述:微处理器 - MPU 8349 TBGA NO-PB W/O ENCR RoHS:否 制造商:Atmel 处理器系列:SAMA5D31 核心:ARM Cortex A5 数据总线宽度:32 bit 最大时钟频率:536 MHz 程序存储器大小:32 KB 数据 RAM 大小:128 KB 接口类型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作电源电压:1.8 V to 3.3 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-324 |
| MPC8349CVVALDB | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:Integrated Host Processor Hardware Specifications |
| MPC8349CVVALFB | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:Integrated Host Processor Hardware Specifications |
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