参数资料
型号: MPC8535AVTAKGA
厂商: Freescale Semiconductor
文件页数: 16/126页
文件大小: 0K
描述: MPU POWERQUICC III 783FCPBGA
标准包装: 1
系列: MPC85xx
处理器类型: 32-位 MPC85xx PowerQUICC III
速度: 600MHz
电压: 1V
安装类型: 表面贴装
封装/外壳: 783-BBGA,FCBGA
供应商设备封装: 783-FCPBGA(29x29)
包装: 托盘
MPC8535E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 5
Electrical Characteristics
Freescale Semiconductor
112
The recommended attachment method to the heat sink is illustrated in the following figure. The heat sink should be attached to
the printed-circuit board with the spring force centered over the die. This spring force should not exceed 10 pounds force (45
Newton).
Figure 73. Package Exploded Cross-Sectional View with Several Heat Sink Options
The system board designer can choose between several types of heat sinks to place on the chip. Ultimately, the final selection
of an appropriate heat sink depends on many factors, such as thermal performance at a given air velocity, spatial volume, mass,
attachment method, assembly, and cost. Several heat sinks offered by Aavid Thermalloy, Advanced Thermal Solutions, Alpha
Novatech, IERC, Chip Coolers, Millennium Electronics, and Wakefield Engineering offer different heat sink-to-ambient
thermal resistances, that will allow the chip to function in various environments.
2.24.3.1
Internal Package Conduction Resistance
For the packaging technology, shown in Table 70, the intrinsic internal conduction thermal resistance paths are as follows:
The die junction-to-case thermal resistance
The die junction-to-board thermal resistance
This figure depicts the primary heat transfer path for a package with an attached heat sink mounted to a printed-circuit board.
Figure 74. Package with Heat Sink Mounted to a Printed-Circuit Board
Thermal Interface Material
Heat Sink
FC-PBGA Package
Heat Sink
Clip
Printed-Circuit Board
Die
External Resistance
Internal Resistance
Radiation
Convection
Radiation
Convection
Heat Sink
Printed-Circuit Board
Thermal Interface Material
Package/Solder Spheres
Die Junction
Die/Package
(Note the internal versus external package resistance)
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