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| 型号： | MPC8535ECVTANGA |
| 厂商： | FREESCALE SEMICONDUCTOR INC |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 32-BIT, 800 MHz, MICROPROCESSOR, PBGA783 |
| 封装： | 29 X 29 MM, 2.80 MM HEIGHT, 1 MM PITCH, LEAD FREE, PLASTIC, FCBGA-783 |
| 文件页数： | 117/126页 |
| 文件大小： | 2861K |
| 代理商： | MPC8535ECVTANGA |
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MPC8535E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 3
High-Speed Serial Interfaces
Freescale Semiconductor
90
Figure 56 shows the PCI output AC timing conditions.
Figure 56. PCI Output AC Timing Measurement Condition
2.20
High-Speed Serial Interfaces
The MPC8535E features two Serializer/Deserializer (SerDes) interfaces to be used for high-speed serial interconnect
applications. The SerDes1 interface is dedicated for PCI Express data transfers. The SerDes2 can be used for SGMII or SATA.
This section describes the common portion of SerDes DC electrical specifications, which is the DC requirement for SerDes
Reference Clocks. The SerDes data lane’s transmitter and receiver reference circuits are also shown.
2.20.1
Signal Terms Definition
The SerDes utilizes differential signaling to transfer data across the serial link. This section defines terms used in the description
and specification of differential signals.
Figure 57 shows how the signals are defined. For illustration purposes, only one SerDes lane is used for description. The figure
shows waveform for either a transmitter output (SDn_TX and SDn_TX) or a receiver input (SDn_RX and SDn_RX). Each
signal swings between A Volts and B Volts where A > B.
Using this waveform, the definitions are as follows. To simplify illustration, the following definitions assume that the SerDes
transmitter and receiver operate in a fully symmetrical differential signaling environment.
1.
Single-Ended Swing
The transmitter output signals and the receiver input signals SDn_TX, SDn_TX, SDn_RX and SDn_RX each have a
peak-to-peak swing of A - B Volts. This is also referred as each signal wire’s Single-Ended Swing.
2.
Differential Output Voltage, VOD (or Differential Output Swing):
The Differential Output Voltage (or Swing) of the transmitter, VOD, is defined as the difference of the two complimentary output
voltages: VSDn_TX - VSDn_TX. The VOD value can be either positive or negative.
3.
Differential Input Voltage, VID (or Differential Input Swing):
The Differential Input Voltage (or Swing) of the receiver, VID, is defined as the difference of the two complimentary input
voltages: VSDn_RX - VSDn_RX. The VID value can be either positive or negative.
4.
Differential Peak Voltage, VDIFFp
The peak value of the differential transmitter output signal or the differential receiver input signal is defined as Differential Peak
Voltage, VDIFFp = |A - B| Volts.
5.
Differential Peak-to-Peak, VDIFFp-p
Since the differential output signal of the transmitter and the differential input signal of the receiver each range from A - B to
-(A - B) Volts, the peak-to-peak value of the differential transmitter output signal or the differential
receiver input signal is defined as Differential Peak-to-Peak Voltage, VDIFFp-p = 2*VDIFFp =
2 * |(A - B)| Volts, which is twice of differential swing in amplitude, or twice of the differential
CLK
Output Delay
tPCKHOV
High-Impedance
tPCKHOZ
Output
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