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参数资料
型号： MPC8572CPXAULB
厂商： FREESCALE SEMICONDUCTOR INC
元件分类： 微控制器/微处理器
英文描述： 32-BIT, 1333 MHz, MICROPROCESSOR, PBGA1023
封装： 33 X 33 MM, PLASTIC, FCBGA-1023
文件页数： 13/138页
文件大小： 1502K
代理商： MPC8572CPXAULB
MPC8572E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 2
Freescale Semiconductor
11
Electrical Characteristics
2
Electrical Characteristics
This section provides the AC and DC electrical specifications for the MPC8572E. The MPC8572E is
currently targeted to these specifications. Some of these specifications are independent of the I/O cell, but
are included for a more complete reference. These are not purely I/O buffer design specifications.
2.1
Overall DC Electrical Characteristics
This section covers the ratings, conditions, and other characteristics.
2.1.1
Absolute Maximum Ratings
Table 1 provides the absolute maximum ratings.
Table 1. Absolute Maximum Ratings1
Characteristic
Symbol
Range
Unit Notes
Core supply voltage
VDD
–0.3 to 1.21
V
—
PLL supply voltage
AVDD
–0.3 to 1.21
V
—
Core power supply for SerDes transceivers
SVDD
–0.3 to 1.21
V
—
Pad power supply for SerDes transceivers
XVDD
–0.3 to 1.21
V
—
DDR SDRAM
Controller I/O
supply voltage
DDR2 SDRAM Interface
GVDD
–0.3 to 1.98
V
—
DDR3 SDRAM Interface
–0.3 to 1.65
—
Three-speed Ethernet I/O, FEC management interface, MII
management voltage
LVDD (for eTSEC1
and eTSEC2)
–0.3 to 3.63
–0.3 to 2.75
V2
TVDD (for eTSEC3
and eTSEC4, FEC)
–0.3 to 3.63
–0.3 to 2.75
—2
DUART, system control and power management, I2C, and JTAG
I/O voltage
OVDD
–0.3 to 3.63
V
—
Local bus I/O voltage
BVDD
–0.3 to 3.63
–0.3 to 2.75
–0.3 to 1.98
V—
Input voltage
DDR2 and DDR3 SDRAM interface signals
MVIN
–0.3 to (GVDD + 0.3)
V
3
DDR2 and DDR3 SDRAM interface reference
MVREFn
–0.3 to (GVDD/2 + 0.3)
V
—
Three-speed Ethernet signals
LVIN
TVIN
–0.3 to (LVDD + 0.3)
–0.3 to (TVDD + 0.3)
V3
Local bus signals
BVIN
–0.3 to (BVDD + 0.3)
—
DUART, SYSCLK, system control and power
management, I2C, and JTAG signals
OVIN
–0.3 to (OVDD + 0.3)
V
3
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