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参数资料
| 型号： | MPC9230FNR2 |
| 厂商： | MOTOROLA INC |
| 元件分类： | 时钟产生/分配 |
| 英文描述： | 800 MHz, OTHER CLOCK GENERATOR, PQCC28 |
| 封装： | PLASTIC, LCC-28 |
| 文件页数： | 5/9页 |
| 文件大小： | 133K |
| 代理商： | MPC9230FNR2 |
4
MPC9230
MOTOROLA ADVANCED CLOCK DRIVERS DEVICE DATA
412
Table 7. AC Characteristics (VCC = 3.3V ± 5%, TA = 0°C to +70°C)a
Symbol
Characteristics
Min
Typ
Max
Unit
Condition
fXTAL
Crystal interface frequency range
10
20
MHz
fREF
FREF_EXT reference frequency range
10
(fVCO,MAX÷M)4b
MHz
fVCO
VCO frequency rangec
800
1600
MHz
fMAX
Output Frequency
N = 11 (
÷1)
N = 00 (
÷2)
N = 01 (
÷4)
N = 10 (
÷8)
400
200
100
50
800
400
200
100
MHz
fS_CLOCK
Serial interface programming clock frequencyd
0
10
MHz
tP,MIN
Minimum pulse width
(S_LOAD, P_LOAD)
50
ns
DC
Output duty cycle
45
50
55
%
tr, tf
Output Rise/Fall Time
0.05
0.3
ns
20% to 80%
tS
Setup Time
S_DATA to S_CLOCK
S_CLOCK to S_LOAD
M, N to P_LOAD
20
ns
tS
Hold Time
S_DATA to S_CLOCK
M, N to P_LOAD
20
ns
tJIT(CC)
Cycle-to-cycle jitter
N = 11 (
÷1)
N = 00 (
÷2)
N = 01 (
÷4)
N = 10 (
÷8)
80
90
130
160
ps
tJIT(PER)
Period Jitter
N = 11 (
÷1)
N = 00 (
÷2)
N = 01 (
÷4)
N = 10 (
÷8)
60
70
120
140
ps
tLOCK
Maximum PLL Lock Time
10
ms
a
AC characteristics apply for parallel output termination of 50
to VTT.
b
The maximum frequency on FREF_EXT is a function of the max. VCO frequency and the M counter. M should be higher than 160 for
stable PLL operation.
c
The input frequency fXTAL and the PLL feedback divider M must match the VCO frequency range: fVCO = fXTAL M ÷ 4.
d
The frequency of S_CLOCK is limited to 10 MHz in serial programming mode. S_CLOCK can be switched at higher frequencies when
used as test clock in test mode 6. See application section for more details.
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