参数资料
型号: MPC9443AER2
厂商: IDT, Integrated Device Technology Inc
文件页数: 1/15页
文件大小: 0K
描述: IC CLK BUFF DVDR MUX 3:16 48LQFP
标准包装: 2,000
类型: 扇出缓冲器(分配),除法器,多路复用器
电路数: 1
比率 - 输入:输出: 3:16
差分 - 输入:输出: 是/无
输入: LVCMOS,LVPECL
输出: LVCMOS
频率 - 最大: 350MHz
电源电压: 2.375 V ~ 3.465 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 48-LQFP
供应商设备封装: 48-TQFP(7x7)
包装: 带卷 (TR)
DATASHEET
2.5V, 3.3V LVCMOS Clock Fanout Buffer
MPC9443
NRND
MPC9443 REVISION 6 AUGUST 23, 2013
1
2013 Integrated Device Technology, Inc.
The Freescale Semiconductor, Inc. MPC9443 is a 2.5 V and 3.3 V compatible 1:16
clock distribution buffer designed for low-voltage high-performance telecom, networking
and computing applications. The device supports 3.3 V, 2.5 V and dual supply voltage
(mixed-voltage) applications. The MPC9443 offers 16 low-skew outputs which are divided
into 4 individually configurable banks. Each output bank can be individually supplied by
2.5 V or 3.3 V, individually set to run at 1X or 1/2X of the input clock frequency or be
disabled (logic low output state). Two selectable LVPECL compatible inputs support
differential clock distribution systems. In addition, one selectable LVCMOS input is
provided for LVCMOS clock distribution systems. The MPC9443 is specified for the
extended temperature range of –40 to +85°C.
Features
Configurable 16 outputs LVCMOS clock distribution buffer
Compatible to single, dual and mixed 3.3 V / 2.5 V voltage supply
Output clock frequency up to 350 MHz
Designed for high-performance telecom, networking and computer applications
Supports applications requiring clock redundancy
Maximum output skew of 250 ps (125 ps within one bank)
Selectable output configurations per output bank
Individually per-bank high-impedance tristate
Output disable (stop in logic low state) control
48-lead LQFP package, Pb-free
Ambient operating temperature range of –40 to 85°C
Functional Description
The MPC9443 is a full static design supporting clock frequencies up to 350 MHz. The signals are generated and retimed on-chip to
ensure minimal skew between the four output banks.
Two independent LVPECL compatible clock inputs are available. This feature supports redundant differential clock sources. In addition,
the MPC9443 supports single-ended LVCMOS clock distribution systems. Each of the four output banks can be individually supplied by
2.5 V or 3.3 V, supporting mixed voltage applications. The FSELx pins choose between division of the input reference frequency by one
or two. The frequency divider can be set individually for each output bank. The MPC9443 output banks are in high-impedance state by
deasserting the OEN pins. Asserting OEN will the enable output banks. Please see Table 4. Output High-Impedance Control (OEN) for
details. The outputs can be synchronously stopped (logic low state). The outputs provide LVCMOS compatible levels with the capability
to drive terminated 50
transmission lines. For series terminated transmission lines, each of the MPC9443 outputs can drive one or two
traces giving the devices an effective fanout of 1:32 at VCC = 3.3 V. The device is packaged in a 7x7 mm2 48-lead LQFP package.
MPC9443
LOW VOLTAGE SUPPLY
2.5 V AND 3.3 V LVCMOS
CLOCK FANOUT BUFFER
AE SUFFIX
48-LEAD LQFP PACKAGE
Pb-FREE PACKAGE
CASE 932-03
SCALE 2:1
NRND – Not Recommend for New Designs
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MPC9446 制造商:MOTOROLA 制造商全称:Motorola, Inc 功能描述:2.5V and 3.3V LVCMOS Clock Fanout Buffer
MPC9446AC 功能描述:时钟缓冲器 2.5 3.3V 275MHz Clock Generator RoHS:否 制造商:Texas Instruments 输出端数量:5 最大输入频率:40 MHz 传播延迟(最大值): 电源电压-最大:3.45 V 电源电压-最小:2.375 V 最大功率耗散: 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:LLP-24 封装:Reel
MPC9446ACR2 功能描述:时钟驱动器及分配 FSL 1-10 LVCMOS Fanout Buffer RoHS:否 制造商:Micrel 乘法/除法因子:1:4 输出类型:Differential 最大输出频率:4.2 GHz 电源电压-最大: 电源电压-最小:5 V 最大工作温度:+ 85 C 封装 / 箱体:SOIC-8 封装:Reel