参数资料
型号: MPC9447ACR2
厂商: INTEGRATED DEVICE TECHNOLOGY INC
元件分类: 时钟及定时
英文描述: 9447 SERIES, LOW SKEW CLOCK DRIVER, 9 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32
封装: PLASTIC, LQFP-32
文件页数: 7/7页
文件大小: 296K
代理商: MPC9447ACR2
6
MPC9447
MOTOROLA ADVANCED CLOCK DRIVERS DEVICE DATA
580
Figure 8. Propagation Delay (tPD) Test Reference
Figure 9. Output–to–Output Skew tSK(LH, HL)
The pin-to-pin skew is defined as the worst case difference in
propagation delay between any similar delay path within a
single device
The time from the output controlled edge to the non-controlled
edge, divided by the time between output controlled edges,
expressed as a percentage
VCC
VCCB2
GND
VCC
VCCB2
GND
VCC
VCCB2
GND
tP
T0
DC = (tP T0 x 100%)
VCC
VCCB2
GND
VCC
VCCB2
GND
tP(LH)
CCLK
QX
tF
tR
VCC=3.3V
VCC=2.5V
2.4
1.8V
0.55
0.6V
Figure 10. Output Pulse Skew (tSK(P)) Test Reference
Figure 11. Output Duty Cycle (DC)
Figure 12. Output Transition Time Test Reference
The variation in cycle time of a signal between adjacent cycles,
over a random sample of adjacent cycle pairs
TN
TJIT(CC) = |TN-TN+1|
TN+1
Figure 13. Cycle–to–Cycle Jitter
Figure 14. Setup and Hold Time (tS, tH) Test Reference
VCC
VCCB2
GND
VCC
VCCB2
GND
CCLK
QX
tSK(LH)
tSK(HL)
tP(HL)
tSK(P) = | tPLH - tPHL |
tP(LH)
tP(HL)
VCC
VCCB2
GND
VCC
VCCB2
GND
tS
CCLK
PCLK
CLK_STOP
tH
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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相关PDF资料
PDF描述
MPC9448ACR2 9448 SERIES, LOW SKEW CLOCK DRIVER, 12 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32
MPC9448AC 9448 SERIES, LOW SKEW CLOCK DRIVER, 12 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32
MPC94551D LOW SKEW CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8
MPC9456FA 9456 SERIES, LOW SKEW CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32
MPC946FA 946 SERIES, LOW SKEW CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32
相关代理商/技术参数
参数描述
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