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| 型号： | MPC946FAR2 |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 时钟及定时 |
| 英文描述： | 946 SERIES, LOW SKEW CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32 |
| 封装： | 7 X 7 MM, 0.80 MM PITCH, PLASTIC, LQFP-32 |
| 文件页数： | 1/4页 |
| 文件大小： | 261K |
| 代理商： | MPC946FAR2 |
6
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Order this document
by MPC946/D
MOTOROLA ADVANCED CLOCK DRIVERS DEVICE DATA
607
Low Voltage 1:10 CMOS
Clock Driver
The MPC946 is a low voltage CMOS, 1:10 clock buffer. The 10 outputs
can be configured into a standard fanout buffer or into 1X and 1/2X com-
binations. The ten outputs were designed and optimized to drive 50
series or parallel terminated transmission lines. With output to output
skews of 350ps the MPC946 is an ideal clock distribution chip for syn-
chronous systems which need a tight level of skew from a large number of
outputs. For a similar product with more outputs consult the MPC949 data
sheet.
2 Selectable LVCMOS/LVTTL Clock Inputs
350ps Output to Output Skew
Drives up to 20 Series Terminated Independent Clock Lines
Maximum Input/Output Frequency of 150MHz
Tristatable Outputs
32–Lead LQFP Packaging
3.3V VCC Supply
With an output impedance of approximately 7
, in both the HIGH and
the LOW logic states, the output buffers of the MPC946 are ideal for driv-
ing series terminated transmission lines. More specifically each of the 10
MPC946 outputs can drive two series terminated transmission lines. With
this capability, the MPC946 has an effective fanout of 1:20 in applications
using point–to–point distribution schemes.
The MPC946 has the capability of generating 1X and 1/2X signals from
a 1X source. The design is fully static, the signals are generated and
retimed inside the chip to ensure minimal skew between the 1X and 1/2X
signals. The device features selectability to allow the user to select the
ratio of 1X outputs to 1/2X outputs.
Two independent LVCMOS/LVTTL compatible clock inputs are available. Designers can take advantage of this feature to
provide redundant clock sources or the addition of a test clock into the system design. With the TCLK_Sel input pulled HIGH the
TCLK1 input is selected.
All of the control inputs are LVCMOS/LVTTL compatible. The Dsel pins choose between 1X and 1/2X outputs. A LOW on the
Dsel pins will select the 1X output. The MR/Tristate input will reset the internal flip flops and tristate the outputs when it is forced
HIGH.
The MPC946 is fully 3.3V compatible. The 32–lead LQFP package was chosen to optimize performance, board space and
cost of the device. The 32–lead LQFP has a 7x7mm body size with a conservative 0.8mm pin spacing.
Rev 2
FA SUFFIX
LQFP PACKAGE
CASE 873A
MPC946
LOW VOLTAGE
1:10 CMOS CLOCK DRIVER
See Upgrade Product – MPC9446
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MPC947 | 制造商:MOTOROLA 制造商全称:Motorola, Inc 功能描述:LOW VOLTAGE 1:9 CLOCK DISTRIBUTION CHIP |
| MPC947FA | 制造商:Freescale Semiconductor 功能描述: |
| MPC948 | 制造商:MOTOROLA 制造商全称:Motorola, Inc 功能描述:LOW VOLTAGE 1:12 CLOCK DISTRIBUTION CHIP |
| MPC948FA | 制造商:Motorola Inc 功能描述:TWELVE DISTRIBUTED-OUTPUT CLOCK DRIVER, 32 Pin, Plastic, QFP |
| MPC948L | 制造商:MOTOROLA 制造商全称:Motorola, Inc 功能描述:LOW VOLTAGE 1:12 CLOCK DISTRIBUTION CHIP |
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