参数资料
型号: MPC948LFA
厂商: INTEGRATED DEVICE TECHNOLOGY INC
元件分类: 时钟及定时
英文描述: 948 SERIES, LOW SKEW CLOCK DRIVER, 12 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32
封装: 7 X 7 MM, 0.80 MM PITCH, LQFP-32
文件页数: 3/6页
文件大小: 439K
代理商: MPC948LFA
MPC948L
ECLinPS and ECLinPS Lite
DL140 — Rev 3
3
MOTOROLA
ABSOLUTE MAXIMUM RATINGS*
Symbol
Parameter
Min
Max
Unit
VCC
Supply Voltage
–0.3
4.6
V
VI
Input Voltage
–0.3
VDD + 0.3
V
IIN
Input Current
±20
mA
TStor
Storage Temperature Range
–40
125
°C
* Absolute maximum continuous ratings are those values beyond which damage to the device may occur. Exposure to these conditions or conditions beyond those
indicated may adversely affect device reliability. Functional operation under absolute–maximum–rated conditions is not implied.
DC CHARACTERISTICS (TA = 0° to 70°C, VCCI = 3.3V ±5%; VCCO = 2.5V ±5% or 3.3V ±5%)
Symbol
Characteristic
Min
Typ
Max
Unit
Condition
VIH
Input HIGH Voltage
PECL_CLK
Other
2.135
2.0
2.42
3.60
V
Single Ended Spec
VIL
Input LOW Voltage
PECL_CLK
Other
1.49
1.825
0.8
V
Single Ended Spec
VPP
Peak–to–Peak Input Voltage
PECL_CLK
300
1000
mV
VCMR
Common Mode Range
PECL_CLK
VCC – 2.0
VCC – 0.6
V
Note 1.
VOH
Output HIGH Voltage
VCCO = 3.3V
VCCO = 2.5V
2.5
2.0
V
IOH = –20mA (Note 2.)
VOL
Output LOW Voltage
0.4
V
IOL = 20mA (Note 2.)
IIN
Input Current
±100
A
Note 3.
CIN
Input Capacitance
4
pF
Cpd
Power Dissipation Capacitance
25
pF
Per Output
ICC
Maximum Quiescent Supply Current
22
55
mA
1. VCMR is the difference from the most positive side of the differential input signal. Normal operation is obtained when the “HIGH” input is within
the VCMR range and the input swing lies within the VPP specification.
2. The MPC948L can drive 50
transmission lines on the incident edge. Each output can drive one 50 parallel terminated transmission line to
the termination voltage of VTT = VCC/2. Alternately, the device drives up to two 50 series terminated transmission lines.
3. Inputs have pull–up resistors which affect input current, PECL_CLK has a pull–down resistor.
AC CHARACTERISTICS (TA = 0° to 70°C, VCCI = 3.3V ±5%; VCCO = 2.5V ±5% or 3.3V ±5%)
Symbol
Characteristic
Min
Typ
Max
Unit
Condition
Fmax
Maximum Input Frequency
150
MHz
Note 4.
tpd
Propagation Delay
PECL_CLK to Q
TTL_CLK to Q
4.0
4.4
8.0
8.9
ns
Note 4.
tsk(o)
Output–to–Output Skew
350
ps
Note 4.
tsk(pr)
Part–to–Part Skew
PECL_CLK to Q
TTL_CLK to Q
1.5
2.0
ns
Notes 4., 5.
tpwo
Output Pulse Width
tCYCLE/2 –
1000
tCYCLE/2
tCYCLE/2 +
1000
ps
Notes 4., 6.
Measured at VCC/2
ts
Setup Time
Sync_OE to PECL_CLK
Sync_OE to TTL_CLK
1.0
0.0
ns
Notes 4., 7.
th
Hold Time
PECL_CLK to Sync_OE
TTL_CLK to Sync_OE
0.0
1.0
ns
Notes 4., 7.
tPZL,tPZH
Output Enable Time
2
10
ns
tPLZ,tPHZ
Output Disable Time
2
10
ns
tr, tf
Output Rise/Fall Time
0.3
1.6
ns
10% to 90%
4. Driving 50
transmission lines
5. Part–to–part skew at a given temperature and voltage
6. Assumes 50% input duty cycle.
7. Setup and Hold times are relative to the falling edge of the input clock
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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MPC948
Low Voltage 3.3V and 2.5V, 1:12 Clock Dlstrlbution Chip
NETCOM
IDT Low Voltage 3.3V and 2.5V, 1:12 Clock Dlstrlbution Chip
Freescale Timing Solutions Organization has been acquired by Integrated Device Technology, Inc
MPC948
3
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