参数资料
型号: MPC991FAR2
厂商: MOTOROLA INC
元件分类: 时钟及定时
英文描述: PLL BASED CLOCK DRIVER, 13 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP52
封装: TQFP-52
文件页数: 7/9页
文件大小: 147K
代理商: MPC991FAR2
MPC990 MPC991
TIMING SOLUTIONS
BR1333 — Rev 6
7
MOTOROLA
should be designed to target this range. The key parameter
that needs to be met in the final filter design is the DC voltage
drop that will be seen between the VCC supply and the VCCA
pin of the MPC990/991. From the data sheet the IVCCA
current (the current sourced through the VCCA pin) is
typically 15mA (20mA maximum), assuming that a minimum
of 3.0V must be maintained on the VCCA pin very little DC
voltage drop can be tolerated when a 3.3V VCC supply is
used. The resistor shown in Figure 4 must have a resistance
of 5–15
to meet the voltage drop criteria. The RC filter
pictured will provide a broadband filter with approximately
100:1 attenuation for noise whose spectral content is above
20KHz. As the noise frequency crosses the series resonant
point of an individual capacitor it’s overall impedance begins
to look inductive and thus increases with increasing
frequency. The parallel capacitor combination shown
ensures that a low impedance path to ground exists for
frequencies well above the bandwidth of the PLL.
Although the MPC990/991 has several design features to
minimize the susceptibility to power supply noise (isolated
power and grounds and fully differential PLL) there still may
be applications in which overall performance is being
degraded due to system power supply noise. The power
supply filter schemes discussed in this section should be
adequate to eliminate power supply noise related problems
in most designs.
Figure 4. Power Supply Filter
VCCA
VCC
MPC990/991
0.01
F
22
F
0.01
F
3.3V
RS=5–15
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