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参数资料
| 型号： | MR80C32-20/883:D |
| 厂商： | ATMEL CORP |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 8-BIT, 20 MHz, MICROCONTROLLER, CQCC44 |
| 封装： | LCC-44 |
| 文件页数： | 91/103页 |
| 文件大小： | 25028K |
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180
8272E–AVR–04/2013
ATmega164A/PA/324A/PA/644A/PA/1284/P
Figure 19-4. Frame formats.
St
Start bit, always low.
(n)
Data bits (0 to 8).
P
Parity bit. Can be odd or even.
Sp
Stop bit, always high.
IDLE
No transfers on the communication line (RxDn or TxDn). An IDLE line
must be high.
The frame format used by the USART is set by the UCSZn2:0, UPMn1:0 and USBSn bits in
UCSRnB and UCSRnC. The Receiver and Transmitter use the same setting. Note that changing
the setting of any of these bits will corrupt all ongoing communication for both the Receiver and
Transmitter.
The USART Character SiZe (UCSZn2:0) bits select the number of data bits in the frame. The
USART Parity mode (UPMn1:0) bits enable and set the type of parity bit. The selection between
one or two stop bits is done by the USART Stop Bit Select (USBSn) bit. The Receiver ignores
the second stop bit. An FE (Frame Error) will therefore only be detected in the cases where the
first stop bit is zero.
19.5.1
Parity Bit Calculation
The parity bit is calculated by doing an exclusive-or of all the data bits. If odd parity is used, the
result of the exclusive or is inverted. The relation between the parity bit and data bits is as
follows::
P
even
Parity bit using even parity.
P
odd
Parity bit using odd parity.
d
n
Data bit n of the character.
If used, the parity bit is located between the last data bit and first stop bit of a serial frame.
19.6
USART Initialization
The USART has to be initialized before any communication can take place. The initialization pro-
cess normally consists of setting the baud rate, setting frame format and enabling the
Transmitter or the Receiver depending on the usage. For interrupt driven USART operation, the
Global Interrupt Flag should be cleared and the USART interrupts should be disabled.
Before doing a re-initialization with changed baud rate or frame format, be sure that there are no
ongoing transmissions during the period the registers are changed. The TXCn Flag can be used
to check that the Transmitter has completed all transfers, and the RXC Flag can be used to
1
0
2
3
4
[5]
[6]
[7]
[8]
[P]
St
Sp1 [Sp2]
(St / IDLE)
(IDLE)
FRAME
P
even
d
n
1
–
d
3
d
2
d
1
d
0
P
odd
d
n
1
–
d
3
d
2
d
1
d
0
1
=
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