参数资料
型号: MSC7116VF1000
厂商: FREESCALE SEMICONDUCTOR INC
元件分类: 数字信号处理
英文描述: 0-BIT, 266 MHz, OTHER DSP, PBGA400
封装: 17 X 17 MM, MAPBGA-400
文件页数: 13/60页
文件大小: 1566K
代理商: MSC7116VF1000
MSC7116 Data Sheet, Rev. 13
Electrical Characteristics
Freescale Semiconductor
20
Table 6 lists the DDR DRAM capacitance.
Tri-state (high impedance off state) leakage current,
VIN = VDDIO
IOZ
–1.0
0.09
1
A
Signal low input current, VIL = 0.4 V
IL
–1.0
0.09
1
A
Signal high input current, VIH = 2.0 V
IH
–1.0
0.09
1
A
Output high voltage, IOH = –2 mA, except open drain pins
VOH
2.0
3.0
V
Output low voltage, IOL= 5 mA
VOL
—0
0.4
V
Typical power at 266 MHz5
P
293.0
mW
Notes:
1.
The value of VDDM at the MSC7116 device must remain within 50 mV of VDDM at the DRAM device at all times.
2.
VREF must be equal to 50% of VDDM and track VDDM variations as measured at the receiver. Peak-to-peak noise must not
exceed ±2% of the DC value.
3.
VTT is not applied directly to the MSC7116 device. It is the level measured at the far end signal termination. It should be equal
to VREF. This rail should track variations in the DC level of VREF.
4.
Output leakage for the memory interface is measured with all outputs disabled, 0 V
≤ VOUT ≤ VDDM.
5.
The core power values were measured.using a standard EFR pattern at typical conditions (25°C, 300 MHz, 1.2 V core).
Table 6. DDR DRAM Capacitance
Parameter/Condition
Symbol
Max
Unit
Input/output capacitance: DQ, DQS
CIO
30
pF
Delta input/output capacitance: DQ, DQS
CDIO
30
pF
Note:
These values were measured under the following conditions:
VDDM = 2.5 V ± 0.125 V
f = 1 MHz
TA = 25°C
VOUT = VDDM/2
VOUT (peak to peak) = 0.2 V
Table 5. DC Electrical Characteristics (continued)
Characteristic
Symbol
Min
Typical
Max
Unit
Because
of
an
order
from
the
United
States
International
Trade
Commission,
BGA-packaged
product
lines
and
part
numbers
indicated
here
currently
are
not
available
from
Freescale
for
import
or
sale
in
the
United
States
prior
to
September
2010:
MSC7116VF1000,
MSC7116VM1000,
MSC711XADS
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