参数资料
型号: MSK5910ERH
厂商: MS KENNEDY CORP
元件分类: 可调正电压单路输出LDO稳压器
英文描述: RAD TOLERANT ULTRA LOW DROPOUT ADJUSTABLE POSITIVE LINEAR REGULATOR
中文描述: 1.5 V-7 V ADJUSTABLE POSITIVE LDO REGULATOR, 0.4 V DROPOUT, PDFP20
封装: HERMETIC SEALED, DFP-20
文件页数: 3/8页
文件大小: 330K
代理商: MSK5910ERH
APPLICATION NOTES
VIN A,B,C,D,E - These pins provide the input power connection to
the MSK 5910RH. This is the supply that will be regulated to the
output. All five pins must be connected for proper operation.
VBIAS - This pin provides power to all internal circuitry including
bias, start-up, thermal limit and overcurrent latch. VBIAS voltage
range is 2.9V to 7.5V. VBIAS should be kept greater than or equal
to VIN.
GND1 - Internally connected to input ground, these pins should be
connected externally by the user to the circuit ground and the
GND2 pins.
LATCH - The MSK 5910RH LATCH pin is used for both current
limit and thermal limit. A capacitor between the LATCH pin and
ground sets a time out delay in the event of an over current or
short circuit condition. The capacitor is charged to approximately
1.6V from a 7.2A (nominal) current source. Exceeding the ther-
mal limit will charge the latch capacitor from a larger current source
for a near instant shutdown. Once the latch capacitor is charged
the device latches off until the latch is reset. Momentarily pull the
LATCH pin low, toggle the shutdown pin high then low or cycle
the power to reset the latch. Toggling the shutdown pin or cycling
the bias power both disable the device during the reset operation
(see SHUTDOWN pin description). Pulling the LATCH pin low im-
mediately enables the device for as long as the LATCH pin is held
low plus the time delay to re-charge the latch capacitor whether or
not the fault has been corrected. Disable the latch feature by tying
the LATCH pin low. With the LATCH pin held low the thermal limit
feature is disabled and the current limit feature will force the out-
put voltage to droop but remain active if excessive current is drawn.
SHUTDOWN - There are two functions to the SHUTDOWN pin. It
may be used to disable the output voltage or to reset the LATCH
pin. To activate the shutdown/reset functions the user must apply
a voltage greater than 1.3V to the SHUTDOWN pin. The output
voltage will turn on when the SHUTDOWN pin is pulled below the
threshold voltage. If the SHUTDOWN pin is not used, it should be
connected to ground.
FB - The FB pin is the inverting input of the internal error amplifier.
The non-inverting input is connected to an internal 1.265V refer-
ence. This error amplifier controls the drive to the output transistor
to force the FB pin to 1.265V. An external resistor divider is con-
nected to the output, FB pin and ground to set the output voltage.
GND2 - Internally connected to output ground, these pins should
be connected externally by the user to the circuit ground and the
GND1 pins.
VOUT A,B,C,D,E - These are the output pins for the device. All
five pins must be connected for proper operation.
Typically, large bulk capacitance is required at the output of a
linear regulator to maintain good load transient response. How-
ever, with the MSK 5910RH this is not the case. A 47F surface
mount tantalum capacitor in parallel with a 0.1F ceramic capaci-
tor from the output to ground should suffice under most condi-
tions. If the user finds that tighter voltage regulation is needed
during output transients, more capacitance may be added. If more
capacitance is added to the output, the bandwidth may suffer.
See typical gain and phase curves.
As previously mentioned, the LATCH pin provides over cur-
rent/output short circuit protection with a timed latch-off circuit.
Reference the LATCH pin description note. The latch off time
out is determined with an external capacitor connected from the
LATCH pin to ground. The time-out period is equal to the time it
takes to charge this external capacitor from 0V to 1.6V. The
latch charging current is provided by an internal current source.
This current is a function of bias voltage and temperature (see
latch charging current curve). For instance, at 25°C, the latch
charging current is 7.2A at VBIAS=3V and 8A at VBIAS=7V.
In the latch-off mode, some additional current will be drawn
from the bias supply. This additional latching current is also a
function of bias voltage and temperature (see typical performance
curves).
The MSK 5910RH current limit function is directly affected by
the input and output voltages. Custom current limit is available;
contact the factory for more information.
3
Rev. O 12/09
POWER SUPPLY BYPASSING
To maximize transient response and minimize power supply tran-
sients it is recommended that a 33F minimum tantalum capacitor
is connected between VIN and ground. A 0.1F ceramic capacitor
should also be used for high frequency bypassing.
START UP OPTIONS
The MSK 5910RH starts up and begins regulating immediately
when VBIAS and VIN are applied simultaneously. Applying VBIAS
before VIN starts the MSK 5910RH up in a disabled or latched
state. When starting in a latched state the device output can be
enabled either by pulling the latch pin low to drain the latch ca-
pacitor or pulsing the shutdown pin high. The shutdown pulse
duration is partially dependent upon the size of the latch capacitor
and should be characterized for each application; 30uS is typically
adequate for a 1uF latch capacitor at 25°C. A momentary high
pulse on the shutdown pin can be achieved using the RC circuit
below if VIN rises rapidly. The resistor and capacitor must be
selected based on the required pulse duration, the rise character-
istic of VIN and the shutdown pin threshold (see shutdown pin
threshold and current curves).
The shutdown pin can be held high and pulled low after VIN comes
up or the latch pin held low and released after VIN comes up to
ensure automatic startup when applying VBIAS before VIN. Ei-
ther of the basic circuits below can be adapted to a variety of
applications for automatic start up when VBIAS rises before VIN.
PIN FUNCTIONS
OUTPUT CAPACITOR SELECTION
OVERCURRENT LATCH-OFF/LATCH PIN CAPACITOR
SELECTION
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