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参数资料
| 型号： | MSM5117800F-70 |
| 厂商： | OKI SEMICONDUCTOR CO., LTD. |
| 英文描述： | 2,097,152-Word x 8-Bit DYNAMIC RAM : FAST PAGE MODE TYPE |
| 中文描述： | 2097152字× 8位动态随机存储器：快速页面模式型 |
| 文件页数： | 8/15页 |
| 文件大小： | 207K |
| 代理商： | MSM5117800F-70 |
FEDD5117800F-01
1
Semiconductor
MSM5117800F
8/15
Notes: 1. A start-up delay of 200
μ
s is required after power-up, followed by a minimum of eight initialization
cycles (
RAS
-only refresh or
CAS
before
RAS
refresh) before proper device operation is achieved.
2. The AC characteristics assume t
T
= 5ns.
3. V
IH
(Min.) and V
IL
(Max.) are reference levels for measuring input timing signals. Transition times (t
T
)
are measured between V
IH
and V
IL
.
4. -50 is measured with a load circuit equivalent to 2TTL load and 50pF, and -60/-70 is measured with a
load circuit equivalent to 2TTL load and 100pF.
5. Operation within the t
RCD
(Max.) limit ensures that t
RAC
(Max.) can be met.
t
(Max.) is specified as a reference point only. If t
RCD
is greater than the specified t
RCD
(Max.) limit,
then the access time is controlled by t
CAC
.
6. Operation within the t
RAD
(Max.) limit ensures that t
RAC
(Max.) can be met.
t
RAD
(Max.) is specified as a reference point only. If t
RAD
is greater than the specified t
RAD
(Max.) limit,
then the access time is controlled by t
AA
.
7. t
OFF
(Max.) and t
OEZ
(Max.) define the time at which the output achieved the open circuit condition and
are not referenced to output voltage levels.
8. t
RCH
or t
RRH
must be satisfied for a read cycle.
9. t
WCS
, t
CWD
, t
RWD
, t
AWD
and t
CPWD
are not restrictive operating parameters. They are included in the data
sheet as electrical characteristics only. If t
WCS
≥
t
WCS
(Min.), then the cycle is an early write cycle and
the data out will remain open circuit (high impedance) throughout the entire cycle. If t
CWD
≥
t
CWD
(Min.), t
RWD
≥
t
RWD
(Min.), t
AWD
≥
t
AWD
(Min.) and t
CPWD
≥
t
CPWD
(Min.), then the cycle is a read modify
write cycle and data out will contain data read from the selected cell; if neither of the above sets of
conditions is satisfied, then the condition of the data out (at access time) is indeterminate.
10.These parameters are referenced to the
CAS
, leading edges in an early write cycle, and to the
WE
leading edge in an
OE
control write cycle, or a read modify write cycle.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MSM5117805A | 制造商:OKI 制造商全称:OKI electronic componets 功能描述:2,097,152-Word x 8-Bit DYNAMIC RAM : FAST PAGE MODE TYPE WITH EDO |
| MSM5117805B | 制造商:OKI 制造商全称:OKI electronic componets 功能描述:2,097,152-Word x 8-Bit DYNAMIC RAM : FAST PAGE MODE TYPE WITH EDO |
| MSM5117805C | 制造商:OKI 制造商全称:OKI electronic componets 功能描述:2,097,152-Word x 8-Bit DYNAMIC RAM : FAST PAGE MODE TYPE WITH EDO |
| MSM5117805D | 制造商:OKI 制造商全称:OKI electronic componets 功能描述:2,097,152-Word x 8-Bit DYNAMIC RAM : FAST PAGE MODE TYPE WITH EDO |
| MSM5117805F | 制造商:OKI 制造商全称:OKI electronic componets 功能描述:2,097,152-Word × 8-Bit DYNAMIC RAM : FAST PAGE MODE TYPE WITH EDO |
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