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参数资料
| 型号： | MSM60804GS-K4 |
| 厂商： | OKI ELECTRIC INDUSTRY CO LTD |
| 元件分类： | 总线控制器 |
| 英文描述： | PCMCIA BUS CONTROLLER, PQFP208 |
| 封装： | 28 X 28 MM, 0.50 MM PITCH, PLASTIC, QFP-208 |
| 文件页数： | 15/54页 |
| 文件大小： | 978K |
| 代理商： | MSM60804GS-K4 |
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Semiconductor
MSM60804
20
A wait can be set for a memory access cycle of the PC card.
A wait can be set for IRDY by a WAIT signal from the card.
A wait can be set for each system clock cycle by the following register:
System Memory Address # Mapping Start High Byte register
The 0-wait state is reported to the NWS pin by the following register:
System Memory Address # Mapping Start High Byte register
I/O Access
The I/O address space of the PC card is 0 to FFFFh.
Accessing to an I/O card is enabled by REG, OE, and WE signals.
Accessing to the I/O address space of the PC card is made through the I/O Address Mapping
window.
The I/O Address Mapping window allocates the following two addresses.
I/O address mapping start address
I/O address mapping stop address
The above address (for each window) is set by the following registers:
I/O Address # Mapping Start Low Byte register
I/O Address # Mapping Start High Byte register
I/O Address # Mapping Stop Low Byte register
I/O Address # Mapping Stop High Byte register
An I/O address space of 0 to FFFh can be allocated to each single I/O address Mapping
window.
The window size is a multiple of 1 byte.
Two windows can be allocated to each slot.
Each window is enabled by setting the following register:
Address Window Enable register (+06h and +46h)
The MSM60804 supports both 8- bit and 16-bit accessing modes on both system interface and card
interface sides.
On the system interface side, the 8-bit and 16-bit accessing modes are switched by the SBHE
signal.
On the card interface side, the accessing method is determined by combinations of CE1 and CE2
signals.
CE1 and CE2 signals are set by A0, IOIS16 and the I/O Control register (+07 and 47h).
A wait can be set for an I/O access cycle of the PC card.
A wait can be set for IRDY by a WAIT signal from the card.
A wait can be set for each system clock cycle by the following register:
I/O Control register (+07 and +47h)
The 0-wait state is transferred to the NWS pin by the following register:
I/O Control register (+07 and +47h)
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MSM60808 | 制造商:OKI 制造商全称:OKI electronic componets 功能描述:PCI to PCMCIA R2.1/CardBus Controller (PPCC) |
| MSM60808GS-K | 制造商:OKI 制造商全称:OKI electronic componets 功能描述:PCI to PCMCIA R2.1/CardBus Controller (PPCC) |
| MSM6100 | 制造商:QUALCOMM 制造商全称:QUALCOMM 功能描述:MSM6100 |
| MSM610W9 | 制造商:Ssac 功能描述: |
| MSM6150 | 制造商:QUALCOMM 制造商全称:QUALCOMM 功能描述:MSM6150 CHIPSET SOLUTION |
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