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Semiconductor
MSM82C53-2RS/GS/JS
Select Counter (SC0, SC1):
Selection of set counter
Read/Load (RL1, RL0):
Count value Reading/Loading format setting
Mode (M2, M1, M0):
Operation waveform mode setting
0
0
M2
Set Contents
0
1
0
M1
1
0
1
0
M0
1
0
1
Mode 0 (Interrupt on Terminal Count)
Mode 1 (Programmable One-Shot)
Mode 2 (Rate Generator)
Mode 3 (Square Wave Generator)
Mode 4 (Software Triggered Strobe)
Mode 5 (Hardware Triggered Strobe)
denotes "not specified".
BCD:
Operation count mode setting
1
0
BCD
Binary Count (16-bit Binary)
BCD Count (4-decade Binary Coded Decimal)
Set Contents
After setting Read/Load, Mode, and BCD in each counter as outlined above, next set the desired
count value. (In some Modes, counting is started immediately after the count value has been
written). This count value setting must conform with the Read/Load format set in advance.
Note that the internal counters are reset to 0000H during control word setting. The counter
value (0000H) can’t be read.
If the two bytes (LSB and MSB) are written at this stage (RL0 and RL1 = 1,1), take note of the
following precaution.
Although the count values may be set in the three counters in any sequence after the control
word has been set in each counter, count values must be set consecutively in the LSB - MSB order
in any one counter.
0
1
0
SC1
1
0
1
0
SC0
Counter #0 Selection
Counter #1 Selection
Counter #2 Selection
Illegal Combination
Set Contents
0
1
0
RL1
Set Contents
1
0
1
0
RL0
Counter Latch Operation
Reading/Loading of Least Significant Byte (LSB)
Reading/Loading of Most Significant Byte (MSB)
Reading/Loading of LSB Followed by MSB