参数资料
型号: MSP430C312IDL
厂商: TEXAS INSTRUMENTS INC
元件分类: 微控制器/微处理器
英文描述: 16-BIT, MROM, 3.3 MHz, RISC MICROCONTROLLER, PDSO56
封装: PLASTIC, SSOP-56
文件页数: 28/31页
文件大小: 346K
代理商: MSP430C312IDL
MSP430x31x
MIXED SIGNAL MICROCONTROLLERS
SLAS165D FEBRUARY 1998 REVISED APRIL 2000
6
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
POST OFFICE BOX 1443
HOUSTON, TEXAS 772511443
short-form description
processing unit
The processing unit is based on a consistent and orthogonal designed CPU and instruction set. This design
structure results in a RISC-like architecture, highly transparent to the application development and
distinguishable by the ease of programming. All operations other than program-flow instructions are
consequently performed as register operations in conjunction with seven addressing modes for source and four
modes for destination operand.
CPU
Sixteen registers located inside the CPU provide
reduced instruction execution time. This reduces
a register-register operation execution time to one
cycle of the processor frequency.
Four registers are reserved for special use as a
program counter, a stack pointer, a status register,
and a constant generator. The remaining ones are
available as general-purpose registers.
Peripherals connected to the CPU using a data
address and control bus can be handled easily
with all instructions for memory manipulation.
instruction set
The instruction set for this register-register
architecture provides a powerful and easy-to-use
assembly language. The instruction set consists of 51 instructions with three formats and seven addressing
modes. Table 1 provides a summation and example of the three types of instruction formats; the addressing
modes are listed in Table 2.
Table 1. Instruction Word Formats
Dual operands, source-destination
e.g. ADD
R4, R5
R4 + R5
→ R5
Single operands, destination only
e.g. CALL R8
PC
→ (TOS), R8 → PC
Relative jump, un-/conditional
e.g. JNE
Jump-on equal bit = 0
Each instruction that operates on word and byte data is identified by the suffix B.
Examples:
Instructions for word operation
Instructions for byte operation
MOV
EDE,TONI
MOV.B
EDE,TONI
ADD
#235h,&MEM
ADD.B
#35h,&MEM
PUSH
R5
PUSH.B
R5
SWPB
R5
Program Counter
General-Purpose Register
PC/R0
Stack Pointer
SP/R1
Status Register
SR/CG1/R2
Constant Generator
CG2/R3
R4
General-Purpose Register
R5
General-Purpose Register
R14
General-Purpose Register
R15
相关PDF资料
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