参数资料
型号: MSP430F2122IRHBR
厂商: TEXAS INSTRUMENTS INC
元件分类: 微控制器/微处理器
英文描述: 16-BIT, FLASH, 16 MHz, RISC MICROCONTROLLER, PQCC32
封装: GREEN, PLASTIC, QFN-32
文件页数: 42/81页
文件大小: 1738K
代理商: MSP430F2122IRHBR
MSP430F21x2
MIXED SIGNAL MICROCONTROLLER
SLAS578G -- NOVEMBER 2007 -- REVISED DECEMBER 2009
47
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
electrical characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted) (continued)
10-bit ADC, built-in voltage reference
PARAMETER
TEST CONDITIONS
TA
VCC
MIN
TYP
MAX
UNIT
Positive built-in
IVREF+ ≤ 1 mA, REF2_5V = 0
2.2
VCC, REF+
Positive built-in
reference analog supply
IVREF+ ≤ 0.5 mA, REF2_5V = 1
2.8
V
VCC, REF+
reference analog supply
voltage range
IVREF+ ≤ 1 mA, REF2_5V = 1
2.9
V
VREF+
Positive built-in
reference voltage
IVREF+ ≤ IVREF+max, REF2_5V = 0
2.2 V/
3V
1.41
1.5
1.59
V
VREF+
reference voltage
IVREF+ ≤ IVREF+max, REF2_5V = 1
3V
2.35
2.5
2.65
V
I
Maximum VREF+ load
2.2 V
±0.5
mA
ILD, VREF+
Maximum VREF+ load
current
3V
±1
mA
V
load reg lation
IVREF+ = 500 A ± 100 A,
Analog input voltage VAx ≈ 0.75 V,
REF2_5V = 0
2.2 V/
3V
±2
LSB
VREF+ load regulation
IVREF+ = 500 A ± 100 A,
Analog input voltage VAx ≈ 1.25 V,
REF2_5V = 1
3V
±2
LSB
VREF+ load regulation
IVREF+ = 100 A→900 A,
V
0 5 x V
Error of
ADC10SR = 0
3V
400
ns
VREF+ load regulation
response time
VAx ≈ 0.5 x VREF+, Error of
conversion result ≤ 1LSB
ADC10SR = 1
3V
2000
ns
CVREF+
Max. capacitance at pin
VREF+ (see Note 1)
IVREF+ ≤±1mA,
REFON = 1, REFOUT = 1
2.2 V/
3V
100
pF
TC
Temperature coefficient
IVREF+ = const. with 0 mA ≤ IVREF+ ≤ 1mA
--40°C
to 85°C
2.2 V/
3V
±100 ppm/°C
TCREF+
Temperature coefficient
IVREF+ = const. with 0 mA ≤ IVREF+ ≤ 1 mA
(see Note 3)
85°Cto
105°C
2.2 V/
3V
±110 ppm/°C
tREFON
Settling time of internal
reference voltage
(see Note 2)
IVREF+ = 0.5 mA, REF2_5V = 0,
REFON = 0 → 1
3.6 V
30
s
IVREF+ = 0.5 mA,
REF2 5V = 0,
ADC10SR = 0
2.2 V
1
s
t
Settling time of
reference buffer
REF2_5V = 0,
REFON = 1,
REFBURST = 1
ADC10SR = 1
2.2 V
2.5
s
tREFBURST reference buffer
(see Note 2)
IVREF+ = 0.5 mA,
REF2 5V = 1,
ADC10SR = 0
3V
2
s
REF2_5V = 1,
REFON = 1,
REFBURST = 1
ADC10SR = 1
3V
4.5
s
NOTES: 1. The capacitance applied to the internal buffer operational amplifier, if switched to terminal P2.4/TA2/A4/VREF+/VeREF+
(REFOUT = 1), must be limited; the reference buffer may become unstable, otherwise.
2. The condition is that the error in a conversion started after tREFON or tRefBuf is less than ±0.5 LSB.
3. Calculated using the box method: ((MAX(VREF(T)) -- MIN(VREF(T))) / MIN(VREF(T)) / (TMAX -- TMIN)
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