参数资料
型号: MSP430F2232TDAR
厂商: TEXAS INSTRUMENTS INC
元件分类: 微控制器/微处理器
英文描述: 16-BIT, FLASH, 16 MHz, RISC MICROCONTROLLER, PDSO38
封装: GREEN, PLASTIC, TSSOP-38
文件页数: 25/94页
文件大小: 1583K
代理商: MSP430F2232TDAR
MSP430F22x2
MSP430F22x4
SLAS504E
– JULY 2006 – REVISED MARCH 2011
Outputs (Ports P1, P2, P3, and P4)
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER
TEST CONDITIONS
VCC
MIN
MAX
UNIT
IOH(max) = -1.5 mA
(1)
VCC - 0.25
VCC
2.2 V
IOH(max) = -6 mA
(2)
VCC - 0.6
VCC
VOH
High-level output voltage
V
IOH(max) = -1.5 mA
(1)
VCC - 0.25
VCC
3 V
IOH(max) = -6 mA
(2)
VCC - 0.6
VCC
IOL(max) = 1.5 mA
(1)
VSS
VSS + 0.25
2.2 V
IOL(max) = 6 mA
(2)
VSS
VSS + 0.6
VOL
Low-level output voltage
V
IOL(max) = 1.5 mA
(1)
VSS
VSS + 0.25
3 V
IOL(max) = 6 mA
(2)
VSS
VSS + 0.6
(1)
The maximum total current, IOH(max) and IOL(max), for all outputs combined, should not exceed ±12 mA to hold the maximum voltage drop
specified.
(2)
The maximum total current, IOH(max) and IOL(max), for all outputs combined, should not exceed ±48 mA to hold the maximum voltage drop
specified.
Output Frequency (Ports P1, P2, P3, and P4)
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER
TEST CONDITIONS
VCC
MIN
TYP
MAX
UNIT
2.2 V
10
P1.4/SMCLK, CL = 20 pF,
fPx.y
Port output frequency (with load)
MHz
RL = 1 k against VCC/2
(1) (2)
3 V
12
2.2 V
12
fPort_CLK
Clock output frequency
P2.0/ACLK, P1.4/SMCLK, CL = 20 pF
(2)
MHz
3 V
16
(1)
Alternatively, a resistive divider with two 2-k
resistors between VCC and VSS is used as load. The output is connected to the center tap
of the divider.
(2)
The output voltage reaches at least 10% and 90% VCC at the specified toggle frequency.
Copyright
2006–2011, Texas Instruments Incorporated
31
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