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参数资料
型号： MSP430F2416TPM
厂商： TEXAS INSTRUMENTS INC
元件分类： 微控制器/微处理器
英文描述： 16-BIT, FLASH, 16 MHz, RISC MICROCONTROLLER, PQFP64
封装： GREEN, PLASTIC, LQFP-64
文件页数： 69/102页
文件大小： 1509K
代理商： MSP430F2416TPM
RLoad
AVCC
CLoad = 100pF
2
DAC Output
RO/P(DAC12.x)
ILoad
Conversion 1
Conversion 2
VOUT
Conversion 3
Glitch
Energy
+/ 1/2 LSB
tsettleLH
tsettleHL
= 3 k
MSP430F261x
MSP430F241x
www.ti.com
SLAS541H
– JUNE 2007 – REVISED MAY 2011
12-Bit DAC Dynamic Specifications
VREF = VCC, DAC12IR = 1 (see Figure 45 and Figure 46), over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted)
PARAMETER
TEST CONDITIONS
VCC
MIN
TYP
MAX
UNIT
DAC12AMPx = 0
→ {2, 3, 4}
60
120
DAC12_xDAT = 800h,
tON
DAC12 on-time
ErrorV(O) < ±0.5 LSB
(1) (see
DAC12AMPx = 0
→ {5, 6}
2.2 V/3 V
15
30
s
Figure 45)
DAC12AMPx = 0
→ 7
6
12
DAC12AMPx = 2
100
200
Settling time,
DAC12_xDAT =
tS(FS)
DAC12AMPx = 3, 5
2.2 V/3 V
40
80
s
full scale
80h
→ F7Fh → 80h
DAC12AMPx = 4, 6, 7
15
30
DAC12AMPx = 2
5
DAC12_xDAT =
Settling time,
tS(C-C)
3F8h
→ 408h → 3F8h
DAC12AMPx = 3, 5
2.2 V/3 V
2
s
code to code
BF8h
→ C08h → BF8h
DAC12AMPx = 4, 6, 7
1
DAC12AMPx = 2
0.05
0.12
DAC12_xDAT =
SR
Slew rate(2)
DAC12AMPx = 3, 5
2.2 V/3 V
0.35
0.7
V/
s
80h
→ F7Fh → 80h
DAC12AMPx = 4, 6, 7
1.5
2.7
DAC12AMPx = 2
600
Glitch energy,
DAC12_xDAT =
DAC12AMPx = 3, 5
2.2 V/3 V
150
nV-s
full scale
80h
→ F7Fh → 80h
DAC12AMPx = 4, 6, 7
30
DAC12AMPx = {2, 3, 4}, DAC12SREFx = 2, DAC12IR = 1,
40
DAC12_xDAT = 800h
3-dB bandwidth,
VDC = 1.5 V,
DAC12AMPx = {5, 6}, DAC12SREFx = 2, DAC12IR = 1,
BW-3dB
2.2 V/3 V
180
kHz
VAC = 0.1 VPP
DAC12_xDAT = 800h
(see Figure 47)
DAC12AMPx = 7, DAC12SREFx = 2, DAC12IR = 1,
550
DAC12_xDAT = 800h
DAC12_0DAT = 800h, No load,
DAC12_1DAT = 80h
F7Fh, RLoad = 3 kΩ,
-80
Channel-to-
fDAC12_1OUT = 10 kHz, Duty cycle = 50%
channel
2.2 V/3 V
dB
crosstalk(1) (see
DAC12_0DAT = 80h
F7Fh, RLoad = 3 kΩ,
Figure 48)
DAC12_1DAT = 800h, No load, fDAC12_0OUT = 10 kHz,
-80
Duty cycle = 50%
(1)
RLoad and CLoad are connected to AVSS (not AVCC/2) in Figure 45.
(2)
Slew rate applies to output voltage steps
≥ 200 mV.
Figure 45. Settling Time and Glitch Energy Testing
Copyright
2007–2011, Texas Instruments Incorporated
69
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