参数资料
型号: MSP430F5419AIZQW
厂商: TEXAS INSTRUMENTS INC
元件分类: 微控制器/微处理器
英文描述: 16-BIT, FLASH, 25 MHz, RISC MICROCONTROLLER, PBGA113
封装: PLASTIC, BGA-113
文件页数: 38/104页
文件大小: 1004K
代理商: MSP430F5419AIZQW
MSP430F543xA, MSP430F541xA
www.ti.com
SLAS655B – JANUARY 2010 – REVISED OCTOBER 2010
Absolute Maximum Ratings
(1)
over operating free-air temperature range (unless otherwise noted)
Voltage applied at VCC to VSS
–0.3 V to 4.1 V
Voltage applied to any pin (excluding VCORE)(2)
–0.3 V to VCC + 0.3 V
Diode current at any device pin
±2 mA
Storage temperature range, Tstg
(3)
–55°C to 105°C
Maximum junction temperature, TJ
95°C
(1)
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2)
All voltages referenced to VSS. VCORE is for internal device usage only. No external DC loading or voltage should be applied.
(3)
Higher temperature may be applied during board soldering according to the current JEDEC J-STD-020 specification with peak reflow
temperatures not higher than classified on the device label on the shipping boxes or reels.
Thermal Packaging Characteristics
VALUE
UNIT
QFP (PZ)
50.1
Low-K board (JESD51-3)
QFP (PN)
57.9
BGA (ZQW)
60
qJA
Junction-to-ambient thermal resistance, still air
°C/W
QFP (PZ)
40.8
High-K board (JESD51-7)
QFP (PN)
37.9
BGA (ZQW)
42
QFP (PZ)
8.9
qJC
Junction-to-case thermal resistance
QFP (PN)
10.3
°C/W
BGA (ZQW)
8
Recommended Operating Conditions
MIN NOM
MAX UNIT
Supply voltage during program execution and flash programming
VCC
1.8
3.6
V
(AVCC = DVCC1/2/3/4 = DVCC)
(1)
VSS
Supply voltage (AVSS = DVSS1/2/3/4 = DVSS)
0
V
TA
Operating free-air temperature
I version
–40
85
°C
TJ
Operating junction temperature
I version
–40
85
°C
CVCORE
Recommended capacitor at VCORE
470
nF
CDVCC/C
Capacitor ratio of DVCC to VCORE
10
VCORE
PMMCOREVx = 0, 1.8 V
≤ VCC ≤ 3.6 V
0
8.0
PMMCOREVx = 1, 2.0 V
≤ VCC ≤ 3.6 V
0
12.0
Processor frequency (maximum MCLK
fSYSTEM
MHz
frequency)(2) (3) (see Figure 1)
PMMCOREVx = 2, 2.2 V
≤ VCC ≤ 3.6 V
0
20.0
PMMCOREVx = 3, 2.4 V
≤ VCC ≤ 3.6 V
0
25.0
(1)
It is recommended to power AVCC and DVCC from the same source. A maximum difference of 0.3 V between AVCC and DVCC can be
tolerated during power up and operation.
(2)
The MSP430 CPU is clocked directly with MCLK. Both the high and low phase of MCLK must not exceed the pulse width of the
specified maximum frequency.
(3)
Modules may have a different maximum input clock specification. Refer to the specification of the respective module in this data sheet.
Copyright 2010, Texas Instruments Incorporated
39
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