I-Cube, Inc.
[Rev. 1.10] 9/5/01
1
MSX Family Data Sheet
Features
Description
The MSX family of SRAM-based bit-oriented switching devices offer flow-through NRZ data rates of up to
150Mb/s and registered clock frequencies of up to 75MHz. The I/O Buffers (IOBs) are individually configurable.
The IOBs can be connected to each other through the switch matrix, which supports One-to-One and One-to-
Many connections.
The proprietary RapidConfigure parallel interface allows fast configuration of both the IOBs and switch matrix.
It also allows readback of the device for test and verification purposes. The MSX devices also support the
industry standard JTAG (IEEE 1149.1) interface for boundary scan testing. The JTAG interface can also be used
to download configuration data to the device. A functional block diagram of the MSX architecture is shown in
Applications
Figure 1 MSX532 Functional Block Diagram
SRAM-based, in-system programmable
Configurable I/O Ports
– Individually programmable as input, output,
bi-directional, or Bus Repeater mode
– Control Signals per I/O port: 2 input enables, 2 output
enables, 2 Global Clock inputs and Next Neighbor
Clock option
– Output data inversion: capable of inverting output
signals in flow through mode
Non-blocking switch matrix
– One-to-One and One-to-Many connections
– Double-buffered configuration RAM cells for
simultaneous global updates
Registered and flow-through data modes
– Up to 75 MHz clock frequency in registered
mode
– Up to 150 Mb/s in flow-through mode
20ns propagation delay in flow-through mode
8mA output current
Dedicated RapidConfigure parallel interface
or JTAG serial interface available for
configuration and readback of MSX devices
3.3V operation, LVTTL I/O’s (5V tolerant)
MSX532 is offered in a 792 TBGA package
MSX340 is offered in a 480 PBGA package
Telecom and datacom switching
Video switches and servers
Test equipment
CLK_0
IE_0
OE_0#
CLK_1
IE_1
OE_1#
I/O BLOCK
I/O
BLOCK
CLK_3
IE_3
OE_3#
CLK_2
IE_2
OE_2#
Port 398
to
Port 266
Port 399 to Port 531
Port 133 to Port 265
Port 0
to
Port 132
SWITCH
MATRIX
I/O
BLOCK
I/O BLOCK
JTAG
Signals
TCK
TDI
TMS
TRST#
TDO
RapidConfigure
Signals
RCA[9:0]
RCB[9:0]
RCC[3:0]
RCI[1:0]
RC_CLK
RC_EN#
RC_RDY
10
4
2
HW_RST#
RCE
UPDATE