- 您现在的位置：买卖IC网 > PDF目录45594 > MUAC4K64-90TDC SPECIALTY MICROPROCESSOR CIRCUIT, PQFP100 PDF资料下载
参数资料
| 型号： | MUAC4K64-90TDC |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | SPECIALTY MICROPROCESSOR CIRCUIT, PQFP100 |
| 封装： | TQFP-100 |
| 文件页数： | 7/32页 |
| 文件大小： | 504K |
| 代理商： | MUAC4K64-90TDC |
第1页第2页第3页第4页第5页第6页当前第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页
Register Descriptions
MUAC Routing CoProcessor (RCP) Family
Rev. 4
15
External Prioritization
For systems where the propagation delay associated with
the Match Flag daisy chain is unacceptable, the MUAC
RCP supports external prioritization. Using external
prioritization, each /MF output is fed to a 1 of N
prioritizing circuit whose outputs are fed back to the /CS
and /OE inputs of the respective MUAC RCPs. Access to
the Highest-Priority Match Memory location or Status
register is accomplished by only enabling the /CS to the
Highest-Priority Match device based on the status of the
/MF flags in the system. Likewise, access to the
Highest-Priority Match device’s PA:AA bus match address
result is accomplished by enabling only the /OE line to the
Highest-Priority Match device.
Initialization
After power is applied to the MUAC RCP the /RESET
line must be pulled LOW for at least 50 ns to ensure that
the
device
establishes its correct initial
operating
conditions. There are control states to initialize the
system-level operating conditions that can be run once the
device or devices in the system have been reset after
power has been applied.
Reset
The Reset condition occurs when the /RESET line is
pulled LOW (Hardware reset,) or when the Reset Control
state is executed (Software reset.) The conditions after a
reset are shown in Table 2.
The Instruction register is enabled for Software Control
mode. To activate Hardware control, the appropriate value
should be written to the Configuration register in two
cycles from the DQ31–0 lines.
For a Hardware reset, FR25, which defines the lowest
priority device, is set HIGH. This means that either FR25
must be set LOW in the lowest-priority device, or a
Memory access cycle or a Compare cycle that generates a
match must be executed for there to be any response when
reading the PA:AA bus or the Status register.
System Initialization
Once the MUAC RCP devices in the system have been
reset, the system operating conditions must be set up. The
MUAC RCP is reset to Software Control mode, so a value
must be written to the Configuration register to set the
persistent operating state of the device. This first write to
the devices in the system must be through Software
control. The following sequence writes a new value to the
Configuration register under software control:
1. Write
006H
to
MUAC
RCPs
(/AV=HIGH,
DQ13=LOW).
The value 006H is the control state Write to
Configuration register, WR FR, with no mask. /AV
being HIGH indicates that this is the instruction to be
written to the Instruction register, and DQ13 being
LOW indicates that it is a Write cycle.
2. Write XXXXXXXXH to MUAC RCPs (/AV=LOW).
The
value
XXXXXXXXH
is
written
to
the
Configuration register, and if FR27–26=00 then the
devices are set to operate in Hardware Control mode.
/AV being LOW causes the control state to execute
using the data present on the DQ31–0 lines.
If the devices in a vertically cascaded system are to be
selected solely through the Device Select register, then the
Page addresses must be set to unique values in each
device. However, to set the Page address in each
Configuration register in turn would require that each
device already had a unique Page Address value. To
overcome this dilemma, there are two special control
states that allow the Page Address registers to be set
individually in this circumstance. Once the general
operating
conditions
have
been
established
by
broadcasting a configuration value to all the MUAC RCPs
in the system, the Page Address values must be set to a
unique value in each device. This is done through a
sequence of WR PA control states, each executed with a
unique value on the DQ31-0 lines. This control state
writes the DS3–0 value into the Page Address field of the
Configuration register of the highest-priority empty
device, and then sets the Full flag of that device to indicate
full (LOW). The next WR PA will therefore be directed to
the next lower-priority device within the system. The
sequence continues until all Page Address values have
been written. The RST FF control state is then broadcast to
all devices to set the Full flags back to Empty, and the
system is then ready for normal operation.
相关PDF资料 |
PDF描述 |
|---|---|
| MUAC8K64-70TDI | SPECIALTY MICROPROCESSOR CIRCUIT, PQFP100 |
| MUNICH128X | 4 CHANNEL(S), 8.192M bps, LOCAL AREA NETWORK CONTROLLER, PQFP160 |
| MUPA64K16-15TJI | SPECIALTY MICROPROCESSOR CIRCUIT, PQFP128 |
| MUR1005FCT | 10 A, 50 V, SILICON, RECTIFIER DIODE, TO-220AB |
| MUR1020FCT | 10 A, 200 V, SILICON, RECTIFIER DIODE, TO-220AB |
相关代理商/技术参数 |
参数描述 |
|---|---|
| MUB08A | 制造商:NSC 制造商全称:National Semiconductor 功能描述:1W, Bypass-Capacitor-less Audio Amplifier with Internal Selectable Gain |
| MUB25-10DZ | 制造商:SMC Corporation of America 功能描述:Cylinder, compact, plate, dbl act, 25mm |
| MUB31DH | 制造商:MICRO-ELECTRONICS 制造商全称:Micro Electronics 功能描述:LOW CURRENT HIGH EFFICIENCY LED |
| MUB32DH | 制造商:MICRO-ELECTRONICS 制造商全称:Micro Electronics 功能描述:ULTRA HIGH BRIGHTNESS RED LED LAMP |
| MUB32DH-5 | 制造商:MICRO-ELECTRONICS 制造商全称:Micro Electronics 功能描述:LOW CURRENT HIGH EFFICIENCY RED LED LAMP |
发布紧急采购，3分钟左右您将得到回复。