参数资料
型号: MX50EBOOKDC1
厂商: Freescale Semiconductor
文件页数: 1/2页
文件大小: 0K
描述: HARDWARE MX50EBOOKDC1
标准包装: 1
系列: i.MX50
附件类型: 电子纸显示器(EPD)
适用于相关产品: i.MX50
i.MX Applications Processors
i.MX50 Family of Applications
Processors
Streamlined Performance
Overview
From the family that introduced the market-leading i.MX508 applications processor for eReaders,
the expanded i.MX50 family is the latest addition to Freescale’s ARM ? Cortex?-A8 product
portfolio. The i.MX502, i.MX503 and i.MX507 derivatives are targeted toward a variety of portable
applications and offer support for electronic paper display (EPD) in addition to LCD. Along with its
companion Freescale MC34708 power management IC (PMIC), the i.MX50 family delivers a low-
Target Applications
?  eReaders 
power, streamlined solution for customers seeking ARM Cortex-A8 performance levels with flexible
design features.
Optimized Performance
the ARM Cortex-A8 core
running 800 MHz with a NEON 
coprocessor and 256 KB of L2 
cache. With OpenVG and ePxP 
hardware, customers can benefit
from enhanced 2-D graphics
and image processing with
little CPU overhead. The 266
MHz memory bus bandwidth 
?  Dual full duplex I S interfaces 
allows for faster throughput and
?  Three I C interfaces and three SPI  memory transfers, improving
overall system performance.
?  Portable navigation devices
?  Outdoor and digital signage  
?  Patient/client monitoring
?  Home and office automation
?  DECT phones
Electronic Paper Displays
The i.MX50 family consists of the
first ARM based device with an
integrated EPD hardware interface.
EPDs offer the following
advantages:
?  High resolution from any angle
?  Sunlight readability
?  Mimics the appearance of ink 
on paper
?  Flexible
?  Light weight
?  Durable
?  Extremely low power
?  Replaces paper in many 
applications
i.MX50 Key Features
?  ARM Cortex-A8 800 MHz 
performance at 1.0V with
?  Enhanced pixel processing  ?  Advanced security features 
pipeline (ePxP) to handle post such as high-assurance
display frame pre-processing in boot, DRM support and AES 
hardware with minimal memory encryption/decryption
overhead
acceleration for enhanced User
Interfaces (UIs)
?  LP-DDR2 DRAM support for 
next-generation, low-power
and high-speed memories, in
addition to mDDR and DDR2
?  Support for SD, SDIO and 
MMC based media
?  Static bus interface (WEIM) 
to support NOR and other
memory mapped devices
2
for audio connectivity
2
interfaces for periperal control
?  OpenVG? 2-D graphics  Benefits
The i.MX50 is built around
?  EPD controller for E Ink panels
i.MX
NEON? coprocessor
?  Enhanced LCD controller 
interface supporting up to
1400 x 1050 resolution
?
?  RAW NAND flash support 
with up to 32-bit ECC-level
protection
?  Dual USB controller and PHYs 
(OTG/Host)
?  10/100 Ethernet
Design Flexibility
The i.MX50 family supports
both LCD and EPD displays to
allow customers the flexibility
in designing their system. The
supported memories include
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