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| 型号： | MX879R |
| 厂商： | IXYS Integrated Circuits Division |
| 文件页数： | 7/11页 |
| 文件大小： | 0K |
| 描述： | IC DVR RELAY/LOAD 8CH 60V 28-QFN |
| 标准包装： | 73 |
| 系列： | * |
| 其它名称： | MX879RCL |
I NTEGRATED C IRCUITS D IVISION
2 Functional Description
Figure 1. Serial Data Transfer Example
MX879
The MX879 is an 8-channel high-voltage driver with
8-bit input control. The MX879 interfaces to a
microprocessor through a standard 3-wire serial
interface and an active-low chip select, or can be used
in a parallel-in, parallel-out configuration.
Parallel data is transferred to the I/O register of the
MX879 through the parallel input pins, IN0 through
IN7, on the falling edge of the chip select pin, CS*.
When CS* is in a logic-low state, serial data can be
I N 7
I N 6
I N 5
I N 4
I N 3
I N 2
I N 1
I N 0
0
0
1
0
1
1
1
0
transferred to the I/O register through the serial input
SDI
1
0
0
0
0
1
1
0
pin, SDI, and from the I/O register through the serial
output pin, SDO. Parallel or serial input data is
transferred from the I/O register to the latch and high
voltage output drivers, OUT0 through OUT7, on the
CS *
SCK
t1
positive edge of CS*. This data remains latched until
the next positive edge of CS*.
SDO
0
0
1
0
1
1
1
0
SDI at
time t1
OUT7
1
The 8-bit I/O shift register is clocked by the serial clock
pin, SCK. Serial data presented at the SDI pin is
transferred to the shift register on the positive edge of
SCK. Data shifts out of the register through the SDO
pin on the negative edge of SCK. SDI and SCK are
ignored, and SDO transitions to a high impedance
condition when CS* is at a logic high state.
Serial data is received by the MX879 through the SDI
OUT6
OUT5
OUT4
OUT3
OUT2
OUT1
OUT0
0
0
0
0
1
1
0
pin. This data is accepted on the rising edge of SCK. A
specific output is programmed to a logic-high state if
SDI is at a logic-high state during the rising edge of
SCK. Conversely, a specific output is programmed to a
logic-low state if SDI is at a logic-low state during the
rising edge of SCK. Outputs transition to their
programmed states on the positive edge of CS* if the
output enable pin, OE, is in a logic-high state.
The MSB input data (IN7) is presented at the serial
output pin, SDO, on the falling edge of CS*. Input data
from IN6 through IN0 is sequentially presented at
SDO on negative SCK transitions if CS* remains in a
logic-low state. If CS* is at a logic-low state beyond 8
cycles of SCK, SDI data that has propagated through
the I/O register will then be presented at SDO. The
SDO pin transitions to a high-impedance state when
CS* is in a logic-high state, thus allowing multiple
serial peripherals to share the microprocessor data
pin.
Devices may be serially cascaded by connecting SDO
to SDI of the next device. Pins SCK and CS* are
common to all devices in serial cascade. For
n-cascaded devices the CS* should remain low for 8n
cycles of SCK.
An output enable pin, OE, enables the driver outputs
OUT0 through OUT7 when logic-high. A logic-low
level on OE forces the OUT0 through OUT7 outputs to
a high-impedance state.
The MX879 can also operate as a parallel-in,
parallel-out level shifter and driver. SCK must remain
at a logic-low state when operating in this mode.
Parallel input data presented to IN0 through IN7 is
captured on the falling edge of CS*. This data is
transferred to OUT0 through OUT7 on the rising edge
of CS*, and remains latched until the next rising edge
of CS*.
R01
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7
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MX879RTR | 功能描述:LED照明驱动器 8 Channel Driver w/60V -120mA Outputs QFN-28 on T&R RoHS:否 制造商:STMicroelectronics 输入电压:11.5 V to 23 V 工作频率: 最大电源电流:1.7 mA 输出电流: 最大工作温度: 安装风格:SMD/SMT 封装 / 箱体:SO-16N |
| MX87C51 DIE | 制造商:Intel 功能描述: |
| MX880 | 制造商:MISCELLANEOUS MANUFACTURERS 功能描述:SEMICONDUCTOR |
| MX8810 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Consumer IC |
| MX881R | 功能描述:LED照明驱动器 Amps V RoHS:否 制造商:STMicroelectronics 输入电压:11.5 V to 23 V 工作频率: 最大电源电流:1.7 mA 输出电流: 最大工作温度: 安装风格:SMD/SMT 封装 / 箱体:SO-16N |
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