参数资料
型号: MX881R
厂商: IXYS CORP
元件分类: 显示驱动器
中文描述: LED DISPLAY DRIVER, PDSO16
封装: 3 X 5 MM, DFN-16
文件页数: 12/13页
文件大小: 398K
代理商: MX881R
MX881
8
7/30/07
Drawing No. 088109
www.claremicronix.com
MX881
IXYS
Serial Interface
The MX881 has a 4 wire serial interface that is capable of operating in two modes: I
2C or SPI. Both
modes transfer 8 bits of information but only 5 bits are actually used to set the internal control register.
Table 3 - Interface Modes
ISEL
Active Interface
1
Standard I
2C slave only serial interface
0
Standard 3-wire SPI
I
2C Bus Interface
The I
2C interface (follows the standard bus protocol and timing as defined by Philips). For complete
information on this bus, refer to
www.semiconductors.philips.com
The MX881 acts as a slave device on the I
2C bus and is compatible with both the HS (High Speed)
Mode and Fast Mode formats. Its primary function is as a receiver, receiving data from a master device
that is used to set a single 5 bit register that determines the average battery current and the output
voltage. It will act as a transmitter after receiving a read command. During a read, the register data will
be output onto the I
2C bus. When receiving a non-broadcast message, the MX881 will respond with an
acknowledge bit, in which it pulls the data bus low at the appropriate time. Data packets begin with the
Master issuing a START command (S) and end with the Master issuing a STOP command (P). A Restart
command is simply another START command that is issued before a STOP command. Note that with
START and STOP commands that SDATA transitions while SCLK is high. Conversely, for all other bits,
SDATA is only allowed to transition while SCLK is low.
Figure 2 - I
2C Sequences
SCLK
SDA TA
STA RT
STOP
DA TA is s table during high period
of SCLK
T
I2 C -D S
T
I2 C-DH
T
I2 C -C S
T
I2 C -S C
T
I2 C -C P
T
I2 C -P C
S
0
1
0
ST
AR
T
Slave Address
R/
W
n
D
7
D
0
D
1
D
2
D
3
D
4
D
5
D
6
AC
K
0
AC
K
0
Data Byte - Written to control
Register
The slave address is internally
fixed to 0111111 b.
0
Unshaded boxes represent bits
sourced by the master .
0
Shaded boxes represent bits
sourced by the MX889.
Write Sequence
Overview
P
ST
O
P
S
0
1
ST
A
R
T
Slave Address
R/
W
n
1
0
1
0
1
AC
K
0
AC
K
0
Data Byte - Register contents
placed on bus by MX889
Slave address is 0111111b.
Status
Read
Sequence
P
ST
O
P
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