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参数资料
| 型号： | N74F299N |
| 厂商： | NXP Semiconductors N.V. |
| 元件分类： | 通用总线功能 |
| 英文描述： | 8-bit universal shift-storage register (3-State) |
| 封装： | N74F299D<SOT163-1 (SO20)|<<http://www.nxp.com/packages/SOT163-1.html<1<week 30, 2004,;N74F299D<SOT163-1 (SO20)|<<http://www.nxp.com/packages/SOT163-1.html<1<week 30 |
| 文件页数： | 6/12页 |
| 文件大小： | 116K |
| 代理商： | N74F299N |
Philips Semiconductors
Product data
74F299
8-bit universal shift/storage register (3-State)
2003 Feb 05
6
DC ELECTRICAL CHARACTERISTICS
Over recommended operating free-air temperature range unless otherwise noted.
SYMBOL
PARAMETER
TEST CONDITIONS
1
LIMITS
TYP
2
UNIT
MIN
MAX
Q0 Q7
Q0, Q7
= 1 mA
I
OH
= –1 mA
±
10%V
CC
±
5%V
CC
±
10%V
CC
±
5%V
CC
2.5
V
V
OH
HIGH level output voltage
HIGH-level output voltage
V
CC
= MIN,
V
IL
= MAX
V
= MIN
IH
2.7
3.4
V
I/On
= 3 mA
I
OH
= –3 mA
2.4
V
2.7
3.3
V
V
OL
LOW level output voltage
LOW-level output voltage
V
CC
= MIN,
V
IL
= MAX,
V
IH
= MIN
I
OL
= MAX
±
10%V
CC
0.35
0.50
V
±
5%V
CC
0.35
0.50
V
V
IK
I
I
Input clamp voltage
V
CC
= MIN, I
I
= I
IK
V
CC
= MAX, V
I
= 7.0 V
V
CC
= 5.5V, V
I
= 5.5 V
–0.73
–1.2
V
Input current at maximum
In ut current at maximum
input voltage
others
100
μ
A
I/On
1
mA
I
IH
HIGH-level input current
except
I/On
V
CC
= MAX, V
I
= 2.7 V
20
μ
A
I
IL
LOW level input current
LOW-level input current
S0, S1
V
CC
= MAX V = 0 5 V
I
= 0.5 V
–1.2
mA
others
–0.6
mA
I
IH +
I
OZH
Off-state output current,
HIGH-level voltage applied
I/On
only
V
CC
= MAX, V
O
= 2.7 V
70
μ
A
I
IL +
I
OZL
Off-state output current
LOW-level voltage applied
Short-circuit output current
3
V
CC
= MAX, V
O
= 0.5 V
–0.6
mA
I
OS
V
CC
= MAX
–60
–150
mA
I
CCH
I
CCL
I
CCZ
55
60
mA
I
CC
Supply current (total)
V
CC
= MAX
70
90
mA
65
95
mA
NOTES:
1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type.
2. All typical values are at V
CC
= 5 V, T
amb
= 25
°
C.
3. Not more than one output should be shorted at a time. For testing I
OS
, the use of high-speed test apparatus and/or sample-and-hold
techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting
of a HIGH output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any
sequence of parameter tests, I
OS
tests should be performed last.
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