参数资料
| 型号： | NB6L14MMNR2G |
| 厂商： | ON Semiconductor |
| 文件页数： | 3/10页 |
| 文件大小： | 0K |
| 描述： | IC CLOCK BUFFER 1:4 3GHZ 16-QFN |
| 标准包装： | 1 |
| 系列： | ECLinPS MAX™ |
| 类型： | 扇出缓冲器（分配） |
| 电路数： | 1 |
| 比率 - 输入:输出： | 1:4 |
| 差分 - 输入:输出： | 是/是 |
| 输入： | CML，LVDS，LVPECL |
| 输出： | CML |
| 频率 - 最大： | 3GHz |
| 电源电压： | 2.375 V ~ 3.63 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-VFQFN 裸露焊盘 |
| 供应商设备封装： | 16-QFN（3x3） |
| 包装： | 剪切带 (CT) |
| 其它名称： | NB6L14MMNR2GOSCT |
NB6L14M
http://onsemi.com
2
Q3
VCC
Q0
VCC
IN
VREFAC
Q2
56
7
8
16
15
14
13
12
11
10
9
1
2
3
4
Exposed Pad (EP)
Figure 2. QFN-16 Pinout
(Top View)
GND
VT
IN
Q3
EN
Q2
Q1
Figure 3. Logic Diagram
Q0
/Q0
Q1
/Q1
Q2
/Q2
Q3
/Q3
Q
D
50
W
50
W
EN
VREFAC
CLK
IN
VT
Table 1. EN TRUTH TABLE
IN
EN
Q0:Q3
0
1
x
1
0
x
1
0
1
0+
1
0
1+
+ = On next negative transition of the input signal (IN).
x = Don't care.
Table 2. PIN DESCRIPTION
Pin
Name
I/O
Description
1
Q1
CML Output
Non-inverted Differential Output. Typically Terminated with 50
W Resistor to VCC.
2
Q1
CML Output
Inverted Differential Output. Typically Terminated with 50
W Resistor to VCC .
3
Q2
CML Output
Non-inverted Differential Output. Typically Terminated with 50
W Resistor to VCC.
4
Q2
CML Output
Inverted Differential Output. Typically Terminated with 50
W Resistor to VCC.
5
Q3
CML Output
Non-inverted Differential Output. Typically Terminated with 50
W Resistor to VCC.
6
Q3
CML Output
Inverted Differential Output. Typically Terminated with 50
W Resistor to VCC.
7
VCC
-
Positive Supply Voltage
8
EN
LVTTL/LVCMOS
Synchronous Output Enable. When LOW, Q outputs will go LOW and Q outputs will
go HIGH on the next negative transition of IN input. The internal DFF register is
clocked on the falling edge of IN input (see Figure 16). The EN pin has an internal
pullup resistor and defaults HIGH when left open.
9
IN
LVPECL, CML,
LVDS
Inverted Differential Clock Input. Internal 50
W Resistor to Termination Pin, VT.
10
VREFAC
Output Voltage Reference for capacitor-coupled inputs, only.
11
VT
Internal 100
W center-tapped Termination Pin for IN and IN.
12
IN
LVPECL, CML,
LVDS
Non-inverted Differential Clock Input. Internal 50
W Resistor to Termination Pin, VT.
13
GND
-
Negative Supply Voltage
14
VCC
-
Positive Supply Voltage
15
Q0
CML Output
Noninverted Differential Output. Typically Terminated with 50
W Resistor to VCC.
16
Q0
CML Output
Inverted Differential Output. Typically Terminated with 50
W Resistor to VCC.
-
EP
-
The Exposed Pad (EP) on the QFN-16 package bottom is thermally connected to the
die for improved heat transfer out of package. The exposed pad must be attached to
a heat-sinking conduit. The pad is not electrically connected to the die, but is
recommended to be electrically and thermally connected to GND on the PC board.
1. In the differential configuration when the input termination pin VT, is connected to a common termination voltage or left open, and if no signal
is applied on IN/IN inputs, then the device will be susceptible to self-oscillation.
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相关代理商/技术参数 |
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| NB6L14MNG | 功能描述:时钟缓冲器 1:4 LVPECL FNOUT BUF RoHS:否 制造商:Texas Instruments 输出端数量:5 最大输入频率:40 MHz 传播延迟（最大值）: 电源电压-最大:3.45 V 电源电压-最小:2.375 V 最大功率耗散: 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:LLP-24 封装:Reel |
| NB6L14MNGEVB | 功能描述:BOARD EVAL NB6L14MNG RoHS:是 类别:编程器，开发系统 >> 评估演示板和套件 系列:* 标准包装:1 系列:PCI Express® (PCIe) 主要目的:接口，收发器，PCI Express 嵌入式:- 已用 IC / 零件:DS80PCI800 主要属性:- 次要属性:- 已供物品:板 |
| NB6L14MNR2G | 功能描述:时钟缓冲器 1:4 LVPECL FNOUT BUF RoHS:否 制造商:Texas Instruments 输出端数量:5 最大输入频率:40 MHz 传播延迟（最大值）: 电源电压-最大:3.45 V 电源电压-最小:2.375 V 最大功率耗散: 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:LLP-24 封装:Reel |
| NB6L14S | 制造商:ONSEMI 制造商全称:ON Semiconductor 功能描述:2.5 V 1:4 AnyLevel? Differential Input to LVDS Fanout Buffer/Translator |
| NB6L14SMNG | 功能描述:时钟缓冲器 CZ4 DIFF IN LVDS OUT RoHS:否 制造商:Texas Instruments 输出端数量:5 最大输入频率:40 MHz 传播延迟（最大值）: 电源电压-最大:3.45 V 电源电压-最小:2.375 V 最大功率耗散: 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:LLP-24 封装:Reel |
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